diff mbox series

[1/8] mtd: spi-nor: core: Introduce number of dice and volatile register offset params

Message ID 170dce4cd6add0a8fbf0a0c5dc070d988496cab8.1659764848.git.Takahiro.Kuwano@infineon.com
State Changes Requested
Delegated to: Ambarus Tudor
Headers show
Series mtd: spi-nor: Add support for Infineon SEMPER s25hl02gt and s25hs02gt | expand

Commit Message

Takahiro Kuwano Aug. 6, 2022, 6:34 a.m. UTC 
From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>

In use of mult-chip devices, we need to access registers in each die for
configuration and status check. The number of dice in the device and
volatile register offset for each die are essential to iterate register
access ops.

The number of dice must be initialized as 1 and may be updated through
SFDP parse.

The volatile register offset table is dinamically allocated based on
the number of dice then filled with offset values collected from SFDP.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
---
 drivers/mtd/spi-nor/core.c | 1 +
 drivers/mtd/spi-nor/core.h | 4 ++++
 2 files changed, 5 insertions(+)
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index f2c64006f8d7..1fe7a33f3189 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2541,6 +2541,7 @@  static void spi_nor_init_default_params(struct spi_nor *nor)
 	params->writesize = 1;
 	params->size = (u64)info->sector_size * info->n_sectors;
 	params->page_size = info->page_size;
+	params->num_of_dice = 1;
 
 	if (!(info->flags & SPI_NOR_NO_FR)) {
 		/* Default to Fast Read for DT and non-DT platform devices. */
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 85b0cf254e97..9a4fbeaf90ae 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -349,6 +349,8 @@  struct spi_nor_otp {
  *			in octal DTR mode.
  * @rdsr_addr_nbytes:	dummy address bytes needed for Read Status Register
  *			command in octal DTR mode.
+ * @num_of_dice:	number of dice in the flash memory.
+ * @vreg_offset:	volatile register offset for each die.
  * @hwcaps:		describes the read and page program hardware
  *			capabilities.
  * @reads:		read capabilities ordered by priority: the higher index
@@ -381,6 +383,8 @@  struct spi_nor_flash_parameter {
 	u8				addr_mode_nbytes;
 	u8				rdsr_dummy;
 	u8				rdsr_addr_nbytes;
+	u8				num_of_dice;
+	u32				*vreg_offset;
 
 	struct spi_nor_hwcaps		hwcaps;
 	struct spi_nor_read_command	reads[SNOR_CMD_READ_MAX];