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[7/8] mtd: spi-nor: spansion: Introduce DEF_4BAM mfr flag

Message ID 6cbf3bc0e8908d6e907bd8c705ce9376765837ba.1659764848.git.Takahiro.Kuwano@infineon.com
State Changes Requested
Delegated to: Ambarus Tudor
Headers show
Series mtd: spi-nor: Add support for Infineon SEMPER s25hl02gt and s25hs02gt | expand

Commit Message

Takahiro Kuwano Aug. 6, 2022, 6:34 a.m. UTC 
From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>

The params->addr_mode_nbytes is set to 3 during BFPT parse in case of
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4. Infineon SEMPER multi-chip devices are
in 4-byte address mode by factory default. A new manufacturer flag,
DEF_4BAM is introduced for such devices to fix the
params->addr_mode_nbytes to 4 in post_bfpt_fixup().

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
---
 drivers/mtd/spi-nor/spansion.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)
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Patch

diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index fc9cc3484aa3..22b0be5d312b 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -10,6 +10,7 @@ 
 
 /* flash_info mfr_flag. Used to clear sticky prorietary SR bits. */
 #define USE_CLSR	BIT(0)
+#define DEF_4BAM	BIT(1)	/* 4-byte address mode by default */
 
 #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
 #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
@@ -581,6 +582,17 @@  static int spansion_nor_sr_ready_and_clear(struct spi_nor *nor)
 	return !(nor->bouncebuf[0] & SR_WIP);
 }
 
+static int
+spansion_post_bfpt_fixup(struct spi_nor *nor,
+			 const struct sfdp_parameter_header *bfpt_header,
+			 const struct sfdp_bfpt *bfpt)
+{
+	if (nor->info->mfr_flags & DEF_4BAM)
+		nor->params->addr_mode_nbytes = 4;
+
+	return 0;
+}
+
 static void spansion_nor_late_init(struct spi_nor *nor)
 {
 	if (nor->params->size > SZ_16M) {
@@ -595,6 +607,7 @@  static void spansion_nor_late_init(struct spi_nor *nor)
 }
 
 static const struct spi_nor_fixups spansion_nor_fixups = {
+	.post_bfpt = spansion_post_bfpt_fixup,
 	.late_init = spansion_nor_late_init,
 };