diff mbox series

[1/2] i2c: tegra: allow DVC support to be compiled out

Message ID 87d646818e2605dad62f82d73f8db3f61e70e1f0.1642348712.git.mirq-linux@rere.qmqm.pl
State Superseded
Headers show
Series i2c: tegra: allow compiling out support for Tegra's special constrollers | expand

Commit Message

Michał Mirosław Jan. 16, 2022, 4:02 p.m. UTC
Save a bit of code for newer Tegra platforms by compiling out
DVC's I2C mode support that's used only for Tegra2.

$ size i2c-tegra.o
    text    data     bss     dec     hex filename
-  10385     240       8   10633    2989 i2c-tegra.o
+   9617     240       8    9865    2689 i2c-tegra.o

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
 drivers/i2c/busses/Kconfig     |  8 ++++++++
 drivers/i2c/busses/i2c-tegra.c | 17 +++++++++++------
 2 files changed, 19 insertions(+), 6 deletions(-)

Comments

Dmitry Osipenko Jan. 18, 2022, 9:46 a.m. UTC | #1
16.01.2022 19:02, Michał Mirosław пишет:
> {
>  	{ .compatible = "nvidia,tegra114-i2c", .data = &tegra114_i2c_hw, },
>  	{ .compatible = "nvidia,tegra30-i2c", .data = &tegra30_i2c_hw, },
>  	{ .compatible = "nvidia,tegra20-i2c", .data = &tegra20_i2c_hw, },
> +#if IS_ENABLED(CONFIG_I2C_TEGRA_DVC)
>  	{ .compatible = "nvidia,tegra20-i2c-dvc", .data = &tegra20_i2c_hw, },
> +#endif

You can use IS_ENABLED(ARCH_TEGRA_2x_SOC), and similar for T210. Then
you won't need to add new Kconfig entries.
Michał Mirosław Jan. 18, 2022, 7:48 p.m. UTC | #2
On Tue, Jan 18, 2022 at 12:46:39PM +0300, Dmitry Osipenko wrote:
> 16.01.2022 19:02, Michał Mirosław пишет:
> > {
> >  	{ .compatible = "nvidia,tegra114-i2c", .data = &tegra114_i2c_hw, },
> >  	{ .compatible = "nvidia,tegra30-i2c", .data = &tegra30_i2c_hw, },
> >  	{ .compatible = "nvidia,tegra20-i2c", .data = &tegra20_i2c_hw, },
> > +#if IS_ENABLED(CONFIG_I2C_TEGRA_DVC)
> >  	{ .compatible = "nvidia,tegra20-i2c-dvc", .data = &tegra20_i2c_hw, },
> > +#endif
> 
> You can use IS_ENABLED(ARCH_TEGRA_2x_SOC), and similar for T210. Then
> you won't need to add new Kconfig entries.

I can do that, thanks! Indeed, the drivers won't be useful with the
specific SoC support disabled anyway.

Best Regards
Michał Mirosław
diff mbox series

Patch

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index dce392839017..b557b832bfec 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -1079,6 +1079,14 @@  config I2C_TEGRA
 	  If you say yes to this option, support will be included for the
 	  I2C controller embedded in NVIDIA Tegra SOCs
 
+config I2C_TEGRA_DVC
+	bool "NVIDIA Tegra DVC I2C controller"
+	depends on I2C_TEGRA
+	default y if ARCH_TEGRA_2x_SOC
+	help
+	  If you say yes to this option, tegra-i2c will also support
+	  I2C controller that is part of DVC in Tegra20 SoCs.
+
 config I2C_TEGRA_BPMP
 	tristate "NVIDIA Tegra BPMP I2C controller"
 	depends on TEGRA_BPMP || COMPILE_TEST
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index b3184c422826..60ecf6c9f649 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -294,6 +294,8 @@  struct tegra_i2c_dev {
 	bool is_vi;
 };
 
+#define IS_DVC(dev) (IS_ENABLED(CONFIG_I2C_TEGRA_DVC) && dev->is_dvc)
+
 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
 		       unsigned int reg)
 {
@@ -311,7 +313,7 @@  static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg)
  */
 static u32 tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, unsigned int reg)
 {
-	if (i2c_dev->is_dvc)
+	if (IS_DVC(i2c_dev))
 		reg += (reg >= I2C_TX_FIFO) ? 0x10 : 0x40;
 	else if (i2c_dev->is_vi)
 		reg = 0xc00 + (reg << 2);
@@ -621,7 +623,7 @@  static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
 	err = reset_control_reset(i2c_dev->rst);
 	WARN_ON_ONCE(err);
 
-	if (i2c_dev->is_dvc)
+	if (IS_DVC(i2c_dev))
 		tegra_dvc_init(i2c_dev);
 
 	val = I2C_CNFG_NEW_MASTER_FSM | I2C_CNFG_PACKET_MODE_EN |
@@ -685,7 +687,7 @@  static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
 		return err;
 	}
 
-	if (!i2c_dev->is_dvc && !i2c_dev->is_vi) {
+	if (!IS_DVC(i2c_dev) && !i2c_dev->is_vi) {
 		u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG);
 
 		sl_cfg |= I2C_SL_CNFG_NACK | I2C_SL_CNFG_NEWSL;
@@ -915,7 +917,7 @@  static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
 	}
 
 	i2c_writel(i2c_dev, status, I2C_INT_STATUS);
-	if (i2c_dev->is_dvc)
+	if (IS_DVC(i2c_dev))
 		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
 
 	/*
@@ -954,7 +956,7 @@  static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
 
 	i2c_writel(i2c_dev, status, I2C_INT_STATUS);
 
-	if (i2c_dev->is_dvc)
+	if (IS_DVC(i2c_dev))
 		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
 
 	if (i2c_dev->dma_mode) {
@@ -1616,7 +1618,9 @@  static const struct of_device_id tegra_i2c_of_match[] = {
 	{ .compatible = "nvidia,tegra114-i2c", .data = &tegra114_i2c_hw, },
 	{ .compatible = "nvidia,tegra30-i2c", .data = &tegra30_i2c_hw, },
 	{ .compatible = "nvidia,tegra20-i2c", .data = &tegra20_i2c_hw, },
+#if IS_ENABLED(CONFIG_I2C_TEGRA_DVC)
 	{ .compatible = "nvidia,tegra20-i2c-dvc", .data = &tegra20_i2c_hw, },
+#endif
 	{},
 };
 MODULE_DEVICE_TABLE(of, tegra_i2c_of_match);
@@ -1635,7 +1639,8 @@  static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev)
 	multi_mode = of_property_read_bool(np, "multi-master");
 	i2c_dev->multimaster_mode = multi_mode;
 
-	if (of_device_is_compatible(np, "nvidia,tegra20-i2c-dvc"))
+	if (IS_ENABLED(CONFIG_I2C_TEGRA_DVC) &&
+	    of_device_is_compatible(np, "nvidia,tegra20-i2c-dvc"))
 		i2c_dev->is_dvc = true;
 
 	if (of_device_is_compatible(np, "nvidia,tegra210-i2c-vi"))