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[v2,1/2] dt-bindings: i2c-stm32: SYSCFG Fast Mode Plus support for I2C STM32F7

Message ID 1542625412-4277-2-git-send-email-pierre-yves.mordret@st.com
State Accepted
Headers show
Series SYSCFG Fast Mode Plus support for I2C STM32F7 | expand

Commit Message

Pierre Yves MORDRET Nov. 19, 2018, 11:03 a.m. UTC 
Append optional bindings to update SYSCFG Fast Mode Plus bits if
Fast Mode Plus speed is selected.

Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
  Version history:
    v2:
    v1:
       * Initial
---
---
 Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Wolfram Sang Nov. 27, 2018, 12:09 p.m. UTC | #1 
On Mon, Nov 19, 2018 at 12:03:31PM +0100, Pierre-Yves MORDRET wrote:
> Append optional bindings to update SYSCFG Fast Mode Plus bits if
> Fast Mode Plus speed is selected.
> 
> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
> Reviewed-by: Rob Herring <robh@kernel.org>

Applied to for-next, thanks!
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Patch

diff --git a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
index 3b54899..69240e1 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
@@ -26,6 +26,11 @@  Optional properties :
 - i2c-scl-falling-time-ns : Only for STM32F7, I2C SCL Falling time for the board
   (default: 10)
   I2C Timings are derived from these 2 values
+- st,syscfg-fmp:  Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG
+  whether Fast Mode Plus speed is selected by slave.
+	1st cell : phandle to syscfg
+	2nd cell : register offset within SYSCFG
+	3rd cell : register bitmask for FMP bit
 
 Example :
 
@@ -53,4 +58,5 @@  Example :
 		clocks = <&rcc 1 CLK_I2C1>;
 		pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
 		pinctrl-names = "default";
+		st,syscfg-fmp = <&syscfg 0x4 0x1>;
 	};