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i2c: designware: Fix failure on baytrail

Message ID 1518450764-6652-1-git-send-email-gardner.ben@gmail.com
State Awaiting Upstream
Headers show
Series i2c: designware: Fix failure on baytrail | expand

Commit Message

Ben Gardner Feb. 12, 2018, 3:52 p.m. UTC
The I2C driver for my Atom E3845 board has been broken since 4.9.
My board has two I2C devices on a bus that are declared via ACPI.
At startup, both drivers attempt to access the devices at the same time,
resulting in two back-to-back I2C transactions initiated by the kernel.
The second transaction fails.

The root issue is that the I2C port takes a while to enable and somewhere
along the way, the 'enable-and-wait' approach to enabling the adapter
was changed to 'enable'.
That caused the driver and hardware to get out of sync and fail.

These kernel logs show up whenever an I2C transaction is attempted after
this failure.
i2c-designware-pci 0000:00:18.3: timeout in disabling adapter
i2c-designware-pci 0000:00:18.3: timeout waiting for bus ready

The driver is unable to recover the bus at this point, but that is a
separate issue.

This patch has been tested on 4.9.

Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
---
 drivers/i2c/busses/i2c-designware-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Ben Gardner Feb. 12, 2018, 3:56 p.m. UTC | #1
I didn't make it clear in the subject line, but this patch is intended
for the 4.9 kernel.
The earlier patch (Feb 9, 2018) was for 4.14, 4.15 and future.

On Mon, Feb 12, 2018 at 9:52 AM, Ben Gardner <gardner.ben@gmail.com> wrote:
> The I2C driver for my Atom E3845 board has been broken since 4.9.
> My board has two I2C devices on a bus that are declared via ACPI.
> At startup, both drivers attempt to access the devices at the same time,
> resulting in two back-to-back I2C transactions initiated by the kernel.
> The second transaction fails.
>
> The root issue is that the I2C port takes a while to enable and somewhere
> along the way, the 'enable-and-wait' approach to enabling the adapter
> was changed to 'enable'.
> That caused the driver and hardware to get out of sync and fail.
>
> These kernel logs show up whenever an I2C transaction is attempted after
> this failure.
> i2c-designware-pci 0000:00:18.3: timeout in disabling adapter
> i2c-designware-pci 0000:00:18.3: timeout waiting for bus ready
>
> The driver is unable to recover the bus at this point, but that is a
> separate issue.
>
> This patch has been tested on 4.9.
>
> Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
> ---
>  drivers/i2c/busses/i2c-designware-core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
> index b403fa5..980e5a1 100644
> --- a/drivers/i2c/busses/i2c-designware-core.c
> +++ b/drivers/i2c/busses/i2c-designware-core.c
> @@ -509,7 +509,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
>         i2c_dw_disable_int(dev);
>
>         /* Enable the adapter */
> -       __i2c_dw_enable(dev, true);
> +       __i2c_dw_enable_and_wait(dev, true);
>
>         /* Clear and enable interrupts */
>         dw_readl(dev, DW_IC_CLR_INTR);
> --
> 2.7.4
>
Jarkko Nikula Feb. 13, 2018, 2:36 p.m. UTC | #2
On 02/12/2018 05:56 PM, Ben Gardner wrote:
> I didn't make it clear in the subject line, but this patch is intended
> for the 4.9 kernel.
> The earlier patch (Feb 9, 2018) was for 4.14, 4.15 and future.
> 
I think we need to handle this patch once earlier patch is applied by 
following the Option 3 rule in 
Documentation/process/stable-kernel-rules.rst.
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index b403fa5..980e5a1 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -509,7 +509,7 @@  static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
 	i2c_dw_disable_int(dev);
 
 	/* Enable the adapter */
-	__i2c_dw_enable(dev, true);
+	__i2c_dw_enable_and_wait(dev, true);
 
 	/* Clear and enable interrupts */
 	dw_readl(dev, DW_IC_CLR_INTR);