| Message ID | 20230405162144.984598-7-hjl.tools@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | <sys/platform/x86.h>: Update CPUID features | expand |
On Wed, Apr 5, 2023 at 11:23 AM H.J. Lu via Libc-alpha <libc-alpha@sourceware.org> wrote: > > Add RTM_FORCE_ABORT support to <sys/platform/x86.h>. > --- > manual/platform.texi | 3 +++ > sysdeps/x86/bits/platform/x86.h | 2 +- > sysdeps/x86/tst-get-cpu-features.c | 1 + > 3 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/manual/platform.texi b/manual/platform.texi > index 4453f6e1f4..2ab687cbba 100644 > --- a/manual/platform.texi > +++ b/manual/platform.texi > @@ -539,6 +539,9 @@ capability. > @item > @code{RTM_ALWAYS_ABORT} -- Transactions always abort, making RTM unusable. > > +@item > +@code{RTM_FORCE_ABORT} -- TSX_FORCE_ABORT MSR. > + > @item > @code{SDBG} -- IA32_DEBUG_INTERFACE MSR for silicon debug. > > diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h > index ee5be8190f..6d9dd6dacf 100644 > --- a/sysdeps/x86/bits/platform/x86.h > +++ b/sysdeps/x86/bits/platform/x86.h > @@ -213,7 +213,7 @@ enum > x86_cpu_MD_CLEAR = x86_cpu_index_7_edx + 10, > x86_cpu_RTM_ALWAYS_ABORT = x86_cpu_index_7_edx + 11, > x86_cpu_INDEX_7_EDX_12 = x86_cpu_index_7_edx + 12, > - x86_cpu_INDEX_7_EDX_13 = x86_cpu_index_7_edx + 13, > + x86_cpu_RTM_FORCE_ABORT = x86_cpu_index_7_edx + 13, > x86_cpu_SERIALIZE = x86_cpu_index_7_edx + 14, > x86_cpu_HYBRID = x86_cpu_index_7_edx + 15, > x86_cpu_TSXLDTRK = x86_cpu_index_7_edx + 16, > diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c > index 1979da2174..8b7e70aee1 100644 > --- a/sysdeps/x86/tst-get-cpu-features.c > +++ b/sysdeps/x86/tst-get-cpu-features.c > @@ -162,6 +162,7 @@ do_test (void) > CHECK_CPU_FEATURE_PRESENT (AVX512_VP2INTERSECT); > CHECK_CPU_FEATURE_PRESENT (MD_CLEAR); > CHECK_CPU_FEATURE_PRESENT (RTM_ALWAYS_ABORT); > + CHECK_CPU_FEATURE_PRESENT (RTM_FORCE_ABORT); > CHECK_CPU_FEATURE_PRESENT (SERIALIZE); > CHECK_CPU_FEATURE_PRESENT (HYBRID); > CHECK_CPU_FEATURE_PRESENT (TSXLDTRK); > -- > 2.39.2 > LGTM Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
diff --git a/manual/platform.texi b/manual/platform.texi index 4453f6e1f4..2ab687cbba 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -539,6 +539,9 @@ capability. @item @code{RTM_ALWAYS_ABORT} -- Transactions always abort, making RTM unusable. +@item +@code{RTM_FORCE_ABORT} -- TSX_FORCE_ABORT MSR. + @item @code{SDBG} -- IA32_DEBUG_INTERFACE MSR for silicon debug. diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index ee5be8190f..6d9dd6dacf 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -213,7 +213,7 @@ enum x86_cpu_MD_CLEAR = x86_cpu_index_7_edx + 10, x86_cpu_RTM_ALWAYS_ABORT = x86_cpu_index_7_edx + 11, x86_cpu_INDEX_7_EDX_12 = x86_cpu_index_7_edx + 12, - x86_cpu_INDEX_7_EDX_13 = x86_cpu_index_7_edx + 13, + x86_cpu_RTM_FORCE_ABORT = x86_cpu_index_7_edx + 13, x86_cpu_SERIALIZE = x86_cpu_index_7_edx + 14, x86_cpu_HYBRID = x86_cpu_index_7_edx + 15, x86_cpu_TSXLDTRK = x86_cpu_index_7_edx + 16, diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c index 1979da2174..8b7e70aee1 100644 --- a/sysdeps/x86/tst-get-cpu-features.c +++ b/sysdeps/x86/tst-get-cpu-features.c @@ -162,6 +162,7 @@ do_test (void) CHECK_CPU_FEATURE_PRESENT (AVX512_VP2INTERSECT); CHECK_CPU_FEATURE_PRESENT (MD_CLEAR); CHECK_CPU_FEATURE_PRESENT (RTM_ALWAYS_ABORT); + CHECK_CPU_FEATURE_PRESENT (RTM_FORCE_ABORT); CHECK_CPU_FEATURE_PRESENT (SERIALIZE); CHECK_CPU_FEATURE_PRESENT (HYBRID); CHECK_CPU_FEATURE_PRESENT (TSXLDTRK);