===================================================================
@@ -521,6 +521,7 @@ void aarch64_err_no_fpadvsimd (machine_m
void aarch64_expand_epilogue (bool);
void aarch64_expand_mov_immediate (rtx, rtx, rtx (*) (rtx, rtx) = 0);
rtx aarch64_ptrue_reg (machine_mode);
+rtx aarch64_pfalse_reg (machine_mode);
void aarch64_emit_sve_pred_move (rtx, rtx, rtx);
void aarch64_expand_sve_mem_move (rtx, rtx, machine_mode);
bool aarch64_maybe_expand_sve_subreg_move (rtx, rtx);
===================================================================
@@ -2467,6 +2467,15 @@ aarch64_ptrue_reg (machine_mode mode)
return force_reg (mode, CONSTM1_RTX (mode));
}
+/* Return an all-false predicate register of mode MODE. */
+
+rtx
+aarch64_pfalse_reg (machine_mode mode)
+{
+ gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL);
+ return force_reg (mode, CONST0_RTX (mode));
+}
+
/* Return true if we can move VALUE into a register using a single
CNT[BHWD] instruction. */
===================================================================
@@ -488,7 +488,7 @@ (define_expand "vec_extract<mode><Vel>"
{
/* The last element can be extracted with a LASTB and a false
predicate. */
- rtx sel = force_reg (<VPRED>mode, CONST0_RTX (<VPRED>mode));
+ rtx sel = aarch64_pfalse_reg (<VPRED>mode);
emit_insn (gen_extract_last_<mode> (operands[0], sel, operands[1]));
DONE;
}