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[wwwdocs] Mention -march=armv8.5-a and other new command line options for AArch64 and Arm for GCC 9

Message ID 66aa7f61-7a7e-b788-c3e6-6ae31808ed62@arm.com
State New
Headers show
Series [wwwdocs] Mention -march=armv8.5-a and other new command line options for AArch64 and Arm for GCC 9 | expand

Commit Message

Sudakshina Das Feb. 22, 2019, 10:45 a.m. UTC
Hi

This patch documents the addition of the new Armv8.5-A and corresponding 
extensions in the gcc-9/changes.html.
As per https://gcc.gnu.org/about.html, I have used W3 Validator.
Is this ok for cvs?

Thanks
Sudi

Comments

Sudakshina Das March 6, 2019, 10:51 a.m. UTC | #1
Pinging and adding Gerald to the CC list.

On 22/02/2019 10:45, Sudakshina Das wrote:
> Hi
> 
> This patch documents the addition of the new Armv8.5-A and corresponding 
> extensions in the gcc-9/changes.html.
> As per https://gcc.gnu.org/about.html, I have used W3 Validator.
> Is this ok for cvs?
> 
> Thanks
> Sudi
Kyrill Tkachov March 12, 2019, 12:03 p.m. UTC | #2
Hi Sudi,

On 2/22/19 10:45 AM, Sudakshina Das wrote:
> Hi
>
> This patch documents the addition of the new Armv8.5-A and corresponding
> extensions in the gcc-9/changes.html.
> As per https://gcc.gnu.org/about.html, I have used W3 Validator.
> Is this ok for cvs?
>
> Thanks
> Sudi


Index: htdocs/gcc-9/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
retrieving revision 1.43
diff -u -r1.43 changes.html
--- htdocs/gcc-9/changes.html	21 Feb 2019 10:32:55 -0000	1.43
+++ htdocs/gcc-9/changes.html	21 Feb 2019 18:25:09 -0000
@@ -283,6 +283,19 @@
      </p>
      <p>The intrinsics are defined by the ACLE specification.</p>
    </li>
+  <li>
+    The Armv8.5-A architecture is now supported. This can be used by specifying the
+   <code>-march=armv8.5-a</code> option.


I tend to prefer the wording "... is now supported through the <code>-march=armv8.5-a</code> option".
Otherwise it reads as the compiler "using" the architecture, whereas we usually talk about "targeting" an architecture.

+  </li>
+  <li> The Armv8.5-A architecture also adds some security features that are optional to all older
+    architecture versions. These are also supported now and only effect the assembler.
+    <ul>
+	<li> Speculation Barrier instruction using <code>-march=armv8-a+sb</code>.</li>
+	<li> Execution and Data Prediction Restriction instructions using <code>-march=armv8-a+predres</code>.</li>
+	<li> Speculative Store Bypass Safe instruction using <code>-march=armv8-a+ssbs</code>. This does not
+	     require a compiler option for Arm and thus <code>-march=armv8-a+ssbs</code> is a AArch64 specific option.</li>

"AArch64-specific"


LGTM otherwise.
Thanks,
Kyrill

+    </ul>
+  </li>
  </ul>
  
  <h5 id="aarch64">AArch64 specific</h5>
@@ -298,6 +311,22 @@
      The default value is 16 (64Kb) and can be changed at configure
      time using the flag <code>--with-stack-clash-protection-guard-size=12|16</code>.
    </li>
+  <li>
+    The option <code>-msign-return-address=</code> has been deprecated. This has been replaced
+    by the new <code>-mbranch-protection=</code> option. This new option can now be used to
+    enable the return address signing as well as the new Branch Target Identification
+    feature of Armv8.5-A architecture. For more information on the arguments accepted by
+    this option, please refer to
+     <a href="https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options">
+	AArch64-Options</a>.
+  </li>
+  <li> The following optional extensions to Armv8.5-A architecture are also supported now and
+       only effect the assembler.
+    <ul>
+	<li> Random Number Generation instructions using <code>-march=armv8.5-a+rng</code>.</li>
+	<li> Memory Tagging Extension using <code>-march=armv8.5-a+memtag</code>.</li>
+    </ul>
+  </li>
  </ul>
  
  <h5 id="arm">Arm specific</h5>
Sudakshina Das March 20, 2019, 10:17 a.m. UTC | #3
Hi Kyrill

On 12/03/2019 12:03, Kyrill Tkachov wrote:
> Hi Sudi,
> 
> On 2/22/19 10:45 AM, Sudakshina Das wrote:
>> Hi
>>
>> This patch documents the addition of the new Armv8.5-A and corresponding
>> extensions in the gcc-9/changes.html.
>> As per https://gcc.gnu.org/about.html, I have used W3 Validator.
>> Is this ok for cvs?
>>
>> Thanks
>> Sudi
> 
> 
> Index: htdocs/gcc-9/changes.html
> ===================================================================
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
> retrieving revision 1.43
> diff -u -r1.43 changes.html
> --- htdocs/gcc-9/changes.html    21 Feb 2019 10:32:55 -0000    1.43
> +++ htdocs/gcc-9/changes.html    21 Feb 2019 18:25:09 -0000
> @@ -283,6 +283,19 @@
>       </p>
>       <p>The intrinsics are defined by the ACLE specification.</p>
>     </li>
> +  <li>
> +    The Armv8.5-A architecture is now supported. This can be used by 
> specifying the
> +   <code>-march=armv8.5-a</code> option.
> 
> 
> I tend to prefer the wording "... is now supported through the 
> <code>-march=armv8.5-a</code> option".
> Otherwise it reads as the compiler "using" the architecture, whereas we 
> usually talk about "targeting" an architecture.
> 
> +  </li>
> +  <li> The Armv8.5-A architecture also adds some security features that 
> are optional to all older
> +    architecture versions. These are also supported now and only effect 
> the assembler.
> +    <ul>
> +    <li> Speculation Barrier instruction using 
> <code>-march=armv8-a+sb</code>.</li>
> +    <li> Execution and Data Prediction Restriction instructions using 
> <code>-march=armv8-a+predres</code>.</li>
> +    <li> Speculative Store Bypass Safe instruction using 
> <code>-march=armv8-a+ssbs</code>. This does not
> +         require a compiler option for Arm and thus 
> <code>-march=armv8-a+ssbs</code> is a AArch64 specific option.</li>
> 
> "AArch64-specific"
> 
> 
> LGTM otherwise.
> Thanks,
> Kyrill

Thanks for the review and sorry for the delay in response. I had edited 
the language for adding new options in a few other places as well.

Thanks
Sudi

> 
> +    </ul>
> +  </li>
>   </ul>
> 
>   <h5 id="aarch64">AArch64 specific</h5>
> @@ -298,6 +311,22 @@
>       The default value is 16 (64Kb) and can be changed at configure
>       time using the flag 
> <code>--with-stack-clash-protection-guard-size=12|16</code>.
>     </li>
> +  <li>
> +    The option <code>-msign-return-address=</code> has been deprecated. 
> This has been replaced
> +    by the new <code>-mbranch-protection=</code> option. This new 
> option can now be used to
> +    enable the return address signing as well as the new Branch Target 
> Identification
> +    feature of Armv8.5-A architecture. For more information on the 
> arguments accepted by
> +    this option, please refer to
> +     <a 
> href="https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options"> 
> 
> +    AArch64-Options</a>.
> +  </li>
> +  <li> The following optional extensions to Armv8.5-A architecture are 
> also supported now and
> +       only effect the assembler.
> +    <ul>
> +    <li> Random Number Generation instructions using 
> <code>-march=armv8.5-a+rng</code>.</li>
> +    <li> Memory Tagging Extension using 
> <code>-march=armv8.5-a+memtag</code>.</li>
> +    </ul>
> +  </li>
>   </ul>
> 
>   <h5 id="arm">Arm specific</h5>
>
Index: htdocs/gcc-9/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
retrieving revision 1.52
diff -u -r1.52 changes.html
--- htdocs/gcc-9/changes.html	7 Mar 2019 14:40:06 -0000	1.52
+++ htdocs/gcc-9/changes.html	18 Mar 2019 18:55:24 -0000
@@ -342,6 +342,24 @@
     </p>
     <p>The intrinsics are defined by the ACLE specification.</p>
   </li>
+  <li>
+    The Armv8.5-A architecture is now supported through the
+    <code>-march=armv8.5-a</code> option.
+  </li>
+  <li> The Armv8.5-A architecture also adds some security features that are
+    optional to all older architecture versions. These are also supported now
+    and only effect the assembler.
+    <ul>
+	<li> Speculation Barrier instruction through the
+	     <code>-march=armv8-a+sb</code> option.</li>
+	<li> Execution and Data Prediction Restriction instructions through
+	     the <code>-march=armv8-a+predres</code> option.</li>
+	<li> Speculative Store Bypass Safe instruction through the
+	     <code>-march=armv8-a+ssbs</code> option. This does not require a
+	     compiler option for Arm and thus <code>-march=armv8-a+ssbs</code>
+	     is an AArch64-specific option.</li>
+    </ul>
+  </li>
 </ul>
 
 <h5 id="aarch64">AArch64 specific</h5>
@@ -362,6 +380,23 @@
     The default value is 16 (64Kb) and can be changed at configure
     time using the flag <code>--with-stack-clash-protection-guard-size=12|16</code>.
   </li>
+  <li>
+    The option <code>-msign-return-address=</code> has been deprecated. This
+    has been replaced by the new <code>-mbranch-protection=</code> option. This
+    new option can now be used to enable the return address signing as well as
+    the new Branch Target Identification feature of Armv8.5-A architecture. For
+    more information on the arguments accepted by this option, please refer to
+     <a href="https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options">AArch64-Options</a>.
+  </li>
+  <li> The following optional extensions to Armv8.5-A architecture are also
+       supported now and only effect the assembler.
+    <ul>
+	<li> Random Number Generation instructions through the
+	     <code>-march=armv8.5-a+rng</code> option.</li>
+	<li> Memory Tagging Extension through the
+	     <code>-march=armv8.5-a+memtag</code> option.</li>
+    </ul>
+  </li>
 </ul>
 
 <h5 id="arm">Arm specific</h5>
James Greenhalgh March 22, 2019, 4:25 p.m. UTC | #4
On Wed, Mar 20, 2019 at 10:17:41AM +0000, Sudakshina Das wrote:
> Hi Kyrill
> 
> On 12/03/2019 12:03, Kyrill Tkachov wrote:
> > Hi Sudi,
> > 
> > On 2/22/19 10:45 AM, Sudakshina Das wrote:
> >> Hi
> >>
> >> This patch documents the addition of the new Armv8.5-A and corresponding
> >> extensions in the gcc-9/changes.html.
> >> As per https://gcc.gnu.org/about.html, I have used W3 Validator.
> >> Is this ok for cvs?
> >>
> >> Thanks
> >> Sudi
> > 
> > 
> > Index: htdocs/gcc-9/changes.html
> > ===================================================================
> > RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
> > retrieving revision 1.43
> > diff -u -r1.43 changes.html
> > --- htdocs/gcc-9/changes.html    21 Feb 2019 10:32:55 -0000    1.43
> > +++ htdocs/gcc-9/changes.html    21 Feb 2019 18:25:09 -0000
> > @@ -283,6 +283,19 @@
> >       </p>
> >       <p>The intrinsics are defined by the ACLE specification.</p>
> >     </li>
> > +  <li>
> > +    The Armv8.5-A architecture is now supported. This can be used by 
> > specifying the
> > +   <code>-march=armv8.5-a</code> option.
> > 
> > 
> > I tend to prefer the wording "... is now supported through the 
> > <code>-march=armv8.5-a</code> option".
> > Otherwise it reads as the compiler "using" the architecture, whereas we 
> > usually talk about "targeting" an architecture.
> > 
> > +  </li>
> > +  <li> The Armv8.5-A architecture also adds some security features that 
> > are optional to all older
> > +    architecture versions. These are also supported now and only effect 
> > the assembler.
> > +    <ul>
> > +    <li> Speculation Barrier instruction using 
> > <code>-march=armv8-a+sb</code>.</li>
> > +    <li> Execution and Data Prediction Restriction instructions using 
> > <code>-march=armv8-a+predres</code>.</li>
> > +    <li> Speculative Store Bypass Safe instruction using 
> > <code>-march=armv8-a+ssbs</code>. This does not
> > +         require a compiler option for Arm and thus 
> > <code>-march=armv8-a+ssbs</code> is a AArch64 specific option.</li>
> > 
> > "AArch64-specific"
> > 
> > 
> > LGTM otherwise.
> > Thanks,
> > Kyrill
> 
> Thanks for the review and sorry for the delay in response. I had edited 
> the language for adding new options in a few other places as well.
> 
> +  <li> The Armv8.5-A architecture also adds some security features that are
> +    optional to all older architecture versions. These are also supported now

s/also supported now/now supported/

> +    and only effect the assembler.

s/effect/affect/

> +    <ul>
> +	<li> Speculation Barrier instruction through the
> +	     <code>-march=armv8-a+sb</code> option.</li>
> +	<li> Execution and Data Prediction Restriction instructions through
> +	     the <code>-march=armv8-a+predres</code> option.</li>
> +	<li> Speculative Store Bypass Safe instruction through the
> +	     <code>-march=armv8-a+ssbs</code> option. This does not require a
> +	     compiler option for Arm and thus <code>-march=armv8-a+ssbs</code>
> +	     is an AArch64-specific option.</li>
> +    </ul>
> +  </li>
>  </ul>
>  
>  <h5 id="aarch64">AArch64 specific</h5>
> @@ -362,6 +380,23 @@
>      The default value is 16 (64Kb) and can be changed at configure
>      time using the flag <code>--with-stack-clash-protection-guard-size=12|16</code>.
>    </li>
> +  <li>
> +    The option <code>-msign-return-address=</code> has been deprecated. This
> +    has been replaced by the new <code>-mbranch-protection=</code> option. This
> +    new option can now be used to enable the return address signing as well as
> +    the new Branch Target Identification feature of Armv8.5-A architecture. For
> +    more information on the arguments accepted by this option, please refer to
> +     <a href="https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options">AArch64-Options</a>.
> +  </li>
> +  <li> The following optional extensions to Armv8.5-A architecture are also
> +       supported now and only effect the assembler.

s/effect/affect/

> +    <ul>
> +	<li> Random Number Generation instructions through the
> +	     <code>-march=armv8.5-a+rng</code> option.</li>
> +	<li> Memory Tagging Extension through the
> +	     <code>-march=armv8.5-a+memtag</code> option.</li>
> +    </ul>
> +  </li>
>  </ul>
>  
>  <h5 id="arm">Arm specific</h5>

Otherwise, OK by me but feel free to wait for people with gooder
grammar than me to have their say.

Thanks,
James
Sudakshina Das March 29, 2019, 1:41 p.m. UTC | #5
Hi James

On 22/03/2019 16:25, James Greenhalgh wrote:
> On Wed, Mar 20, 2019 at 10:17:41AM +0000, Sudakshina Das wrote:
>> Hi Kyrill
>>
>> On 12/03/2019 12:03, Kyrill Tkachov wrote:
>>> Hi Sudi,
>>>
>>> On 2/22/19 10:45 AM, Sudakshina Das wrote:
>>>> Hi
>>>>
>>>> This patch documents the addition of the new Armv8.5-A and corresponding
>>>> extensions in the gcc-9/changes.html.
>>>> As per https://gcc.gnu.org/about.html, I have used W3 Validator.
>>>> Is this ok for cvs?
>>>>
>>>> Thanks
>>>> Sudi
>>>
>>>
>>> Index: htdocs/gcc-9/changes.html
>>> ===================================================================
>>> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
>>> retrieving revision 1.43
>>> diff -u -r1.43 changes.html
>>> --- htdocs/gcc-9/changes.html    21 Feb 2019 10:32:55 -0000    1.43
>>> +++ htdocs/gcc-9/changes.html    21 Feb 2019 18:25:09 -0000
>>> @@ -283,6 +283,19 @@
>>>        </p>
>>>        <p>The intrinsics are defined by the ACLE specification.</p>
>>>      </li>
>>> +  <li>
>>> +    The Armv8.5-A architecture is now supported. This can be used by
>>> specifying the
>>> +   <code>-march=armv8.5-a</code> option.
>>>
>>>
>>> I tend to prefer the wording "... is now supported through the
>>> <code>-march=armv8.5-a</code> option".
>>> Otherwise it reads as the compiler "using" the architecture, whereas we
>>> usually talk about "targeting" an architecture.
>>>
>>> +  </li>
>>> +  <li> The Armv8.5-A architecture also adds some security features that
>>> are optional to all older
>>> +    architecture versions. These are also supported now and only effect
>>> the assembler.
>>> +    <ul>
>>> +    <li> Speculation Barrier instruction using
>>> <code>-march=armv8-a+sb</code>.</li>
>>> +    <li> Execution and Data Prediction Restriction instructions using
>>> <code>-march=armv8-a+predres</code>.</li>
>>> +    <li> Speculative Store Bypass Safe instruction using
>>> <code>-march=armv8-a+ssbs</code>. This does not
>>> +         require a compiler option for Arm and thus
>>> <code>-march=armv8-a+ssbs</code> is a AArch64 specific option.</li>
>>>
>>> "AArch64-specific"
>>>
>>>
>>> LGTM otherwise.
>>> Thanks,
>>> Kyrill
>>
>> Thanks for the review and sorry for the delay in response. I had edited
>> the language for adding new options in a few other places as well.
>>
>> +  <li> The Armv8.5-A architecture also adds some security features that are
>> +    optional to all older architecture versions. These are also supported now
> 
> s/also supported now/now supported/
> 
>> +    and only effect the assembler.
> 
> s/effect/affect/
> 
>> +    <ul>
>> +	<li> Speculation Barrier instruction through the
>> +	     <code>-march=armv8-a+sb</code> option.</li>
>> +	<li> Execution and Data Prediction Restriction instructions through
>> +	     the <code>-march=armv8-a+predres</code> option.</li>
>> +	<li> Speculative Store Bypass Safe instruction through the
>> +	     <code>-march=armv8-a+ssbs</code> option. This does not require a
>> +	     compiler option for Arm and thus <code>-march=armv8-a+ssbs</code>
>> +	     is an AArch64-specific option.</li>
>> +    </ul>
>> +  </li>
>>   </ul>
>>   
>>   <h5 id="aarch64">AArch64 specific</h5>
>> @@ -362,6 +380,23 @@
>>       The default value is 16 (64Kb) and can be changed at configure
>>       time using the flag <code>--with-stack-clash-protection-guard-size=12|16</code>.
>>     </li>
>> +  <li>
>> +    The option <code>-msign-return-address=</code> has been deprecated. This
>> +    has been replaced by the new <code>-mbranch-protection=</code> option. This
>> +    new option can now be used to enable the return address signing as well as
>> +    the new Branch Target Identification feature of Armv8.5-A architecture. For
>> +    more information on the arguments accepted by this option, please refer to
>> +     <a href="https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options">AArch64-Options</a>.
>> +  </li>
>> +  <li> The following optional extensions to Armv8.5-A architecture are also
>> +       supported now and only effect the assembler.
> 
> s/effect/affect/
> 
>> +    <ul>
>> +	<li> Random Number Generation instructions through the
>> +	     <code>-march=armv8.5-a+rng</code> option.</li>
>> +	<li> Memory Tagging Extension through the
>> +	     <code>-march=armv8.5-a+memtag</code> option.</li>
>> +    </ul>
>> +  </li>
>>   </ul>
>>   
>>   <h5 id="arm">Arm specific</h5>
> 
> Otherwise, OK by me but feel free to wait for people with gooder
> grammar than me to have their say.
> 

Thanks for spotting those. So far no one else with gooder grammar has 
pointed out anything else. I will commit the patch with the changes you 
suggested on Monday if no one else has any other objections.

Thanks
Sudi

> Thanks,
> James
>
Sudakshina Das April 1, 2019, 3 p.m. UTC | #6
Hi James

On 29/03/2019 13:41, Sudakshina Das wrote:
> Hi James
> 
> On 22/03/2019 16:25, James Greenhalgh wrote:
>> On Wed, Mar 20, 2019 at 10:17:41AM +0000, Sudakshina Das wrote:
>>> Hi Kyrill
>>>
>>> On 12/03/2019 12:03, Kyrill Tkachov wrote:
>>>> Hi Sudi,
>>>>
>>>> On 2/22/19 10:45 AM, Sudakshina Das wrote:
>>>>> Hi
>>>>>
>>>>> This patch documents the addition of the new Armv8.5-A and 
>>>>> corresponding
>>>>> extensions in the gcc-9/changes.html.
>>>>> As per https://gcc.gnu.org/about.html, I have used W3 Validator.
>>>>> Is this ok for cvs?
>>>>>
>>>>> Thanks
>>>>> Sudi
>>>>
>>>>
>>>> Index: htdocs/gcc-9/changes.html
>>>> ===================================================================
>>>> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
>>>> retrieving revision 1.43
>>>> diff -u -r1.43 changes.html
>>>> --- htdocs/gcc-9/changes.html    21 Feb 2019 10:32:55 -0000    1.43
>>>> +++ htdocs/gcc-9/changes.html    21 Feb 2019 18:25:09 -0000
>>>> @@ -283,6 +283,19 @@
>>>>        </p>
>>>>        <p>The intrinsics are defined by the ACLE specification.</p>
>>>>      </li>
>>>> +  <li>
>>>> +    The Armv8.5-A architecture is now supported. This can be used by
>>>> specifying the
>>>> +   <code>-march=armv8.5-a</code> option.
>>>>
>>>>
>>>> I tend to prefer the wording "... is now supported through the
>>>> <code>-march=armv8.5-a</code> option".
>>>> Otherwise it reads as the compiler "using" the architecture, whereas we
>>>> usually talk about "targeting" an architecture.
>>>>
>>>> +  </li>
>>>> +  <li> The Armv8.5-A architecture also adds some security features 
>>>> that
>>>> are optional to all older
>>>> +    architecture versions. These are also supported now and only 
>>>> effect
>>>> the assembler.
>>>> +    <ul>
>>>> +    <li> Speculation Barrier instruction using
>>>> <code>-march=armv8-a+sb</code>.</li>
>>>> +    <li> Execution and Data Prediction Restriction instructions using
>>>> <code>-march=armv8-a+predres</code>.</li>
>>>> +    <li> Speculative Store Bypass Safe instruction using
>>>> <code>-march=armv8-a+ssbs</code>. This does not
>>>> +         require a compiler option for Arm and thus
>>>> <code>-march=armv8-a+ssbs</code> is a AArch64 specific option.</li>
>>>>
>>>> "AArch64-specific"
>>>>
>>>>
>>>> LGTM otherwise.
>>>> Thanks,
>>>> Kyrill
>>>
>>> Thanks for the review and sorry for the delay in response. I had edited
>>> the language for adding new options in a few other places as well.
>>>
>>> +  <li> The Armv8.5-A architecture also adds some security features 
>>> that are
>>> +    optional to all older architecture versions. These are also 
>>> supported now
>>
>> s/also supported now/now supported/
>>
>>> +    and only effect the assembler.
>>
>> s/effect/affect/
>>
>>> +    <ul>
>>> +    <li> Speculation Barrier instruction through the
>>> +         <code>-march=armv8-a+sb</code> option.</li>
>>> +    <li> Execution and Data Prediction Restriction instructions through
>>> +         the <code>-march=armv8-a+predres</code> option.</li>
>>> +    <li> Speculative Store Bypass Safe instruction through the
>>> +         <code>-march=armv8-a+ssbs</code> option. This does not 
>>> require a
>>> +         compiler option for Arm and thus 
>>> <code>-march=armv8-a+ssbs</code>
>>> +         is an AArch64-specific option.</li>
>>> +    </ul>
>>> +  </li>
>>>   </ul>
>>>   <h5 id="aarch64">AArch64 specific</h5>
>>> @@ -362,6 +380,23 @@
>>>       The default value is 16 (64Kb) and can be changed at configure
>>>       time using the flag 
>>> <code>--with-stack-clash-protection-guard-size=12|16</code>.
>>>     </li>
>>> +  <li>
>>> +    The option <code>-msign-return-address=</code> has been 
>>> deprecated. This
>>> +    has been replaced by the new <code>-mbranch-protection=</code> 
>>> option. This
>>> +    new option can now be used to enable the return address signing 
>>> as well as
>>> +    the new Branch Target Identification feature of Armv8.5-A 
>>> architecture. For
>>> +    more information on the arguments accepted by this option, 
>>> please refer to
>>> +     <a 
>>> href="https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options">AArch64-Options</a>. 
>>>
>>> +  </li>
>>> +  <li> The following optional extensions to Armv8.5-A architecture 
>>> are also
>>> +       supported now and only effect the assembler.
>>
>> s/effect/affect/
>>
>>> +    <ul>
>>> +    <li> Random Number Generation instructions through the
>>> +         <code>-march=armv8.5-a+rng</code> option.</li>
>>> +    <li> Memory Tagging Extension through the
>>> +         <code>-march=armv8.5-a+memtag</code> option.</li>
>>> +    </ul>
>>> +  </li>
>>>   </ul>
>>>   <h5 id="arm">Arm specific</h5>
>>
>> Otherwise, OK by me but feel free to wait for people with gooder
>> grammar than me to have their say.
>>
> 
> Thanks for spotting those. So far no one else with gooder grammar has 
> pointed out anything else. I will commit the patch with the changes you 
> suggested on Monday if no one else has any other objections.
> 

Committed as 1.56

Thanks
Sudi

> Thanks
> Sudi
> 
>> Thanks,
>> James
>>
>
diff mbox series

Patch

Index: htdocs/gcc-9/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v
retrieving revision 1.43
diff -u -r1.43 changes.html
--- htdocs/gcc-9/changes.html	21 Feb 2019 10:32:55 -0000	1.43
+++ htdocs/gcc-9/changes.html	21 Feb 2019 18:25:09 -0000
@@ -283,6 +283,19 @@ 
     </p>
     <p>The intrinsics are defined by the ACLE specification.</p>
   </li>
+  <li>
+    The Armv8.5-A architecture is now supported. This can be used by specifying the
+   <code>-march=armv8.5-a</code> option.
+  </li>
+  <li> The Armv8.5-A architecture also adds some security features that are optional to all older
+    architecture versions. These are also supported now and only effect the assembler.
+    <ul>
+	<li> Speculation Barrier instruction using <code>-march=armv8-a+sb</code>.</li>
+	<li> Execution and Data Prediction Restriction instructions using <code>-march=armv8-a+predres</code>.</li>
+	<li> Speculative Store Bypass Safe instruction using <code>-march=armv8-a+ssbs</code>. This does not
+	     require a compiler option for Arm and thus <code>-march=armv8-a+ssbs</code> is a AArch64 specific option.</li>
+    </ul>
+  </li>
 </ul>
 
 <h5 id="aarch64">AArch64 specific</h5>
@@ -298,6 +311,22 @@ 
     The default value is 16 (64Kb) and can be changed at configure
     time using the flag <code>--with-stack-clash-protection-guard-size=12|16</code>.
   </li>
+  <li>
+    The option <code>-msign-return-address=</code> has been deprecated. This has been replaced
+    by the new <code>-mbranch-protection=</code> option. This new option can now be used to
+    enable the return address signing as well as the new Branch Target Identification
+    feature of Armv8.5-A architecture. For more information on the arguments accepted by
+    this option, please refer to
+     <a href="https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options">
+	AArch64-Options</a>.
+  </li>
+  <li> The following optional extensions to Armv8.5-A architecture are also supported now and
+       only effect the assembler.
+    <ul>
+	<li> Random Number Generation instructions using <code>-march=armv8.5-a+rng</code>.</li>
+	<li> Memory Tagging Extension using <code>-march=armv8.5-a+memtag</code>.</li>
+    </ul>
+  </li>
 </ul>
 
 <h5 id="arm">Arm specific</h5>