diff mbox series

[05/10] x86: replace/correct bogus "prefix_extra"

Message ID 5a5fae9d-e240-c808-702b-93871e39be47@suse.com
State New
Headers show
Series x86: (mainly) "prefix_extra" adjustments | expand

Commit Message

Jan Beulich Aug. 3, 2023, 8:12 a.m. UTC 
In the rdrand and rdseed cases "prefix_0f" is meant instead. For
mmx_floatv2siv2sf2 1 is correct only for the first alternative. For
the integer min/max cases 1 uniformly applies to legacy and VEX
encodings (the UB and SW variants are dealt with separately anyway).
Same for {,V}MOVNTDQA.

Unlike {,V}PEXTRW, which has two encoding forms, {,V}PINSRW only has
a single form in 0f space. (In *vec_extract<mode> note that the
dropped part if the condition also referenced non-existing alternative
2.)

Of the integer compare insns, only the 64-bit element forms are encoded
in 0f38 space.

gcc/

	* config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
	"prefix_extra".
	(@rdseed<mode>): Likewise.
	* config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
	Adjust "prefix_extra".
	* config/i386/sse.md (@vec_set<mode>_0): Likewise.
	(*sse4_1_<code><mode>3<mask_name>): Likewise.
	(*avx2_eq<mode>3): Likewise.
	(avx2_gt<mode>3): Likewise.
	(<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
	(*vec_extract<mode>): Likewise.
	(<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.

Comments

Hongtao Liu Aug. 4, 2023, 1:56 a.m. UTC | #1 
On Thu, Aug 3, 2023 at 4:14 PM Jan Beulich via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> In the rdrand and rdseed cases "prefix_0f" is meant instead. For
> mmx_floatv2siv2sf2 1 is correct only for the first alternative. For
> the integer min/max cases 1 uniformly applies to legacy and VEX
> encodings (the UB and SW variants are dealt with separately anyway).
> Same for {,V}MOVNTDQA.
>
> Unlike {,V}PEXTRW, which has two encoding forms, {,V}PINSRW only has
> a single form in 0f space. (In *vec_extract<mode> note that the
> dropped part if the condition also referenced non-existing alternative
> 2.)
>
> Of the integer compare insns, only the 64-bit element forms are encoded
> in 0f38 space.
Ok.
>
> gcc/
>
>         * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
>         "prefix_extra".
>         (@rdseed<mode>): Likewise.
>         * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
>         Adjust "prefix_extra".
>         * config/i386/sse.md (@vec_set<mode>_0): Likewise.
>         (*sse4_1_<code><mode>3<mask_name>): Likewise.
>         (*avx2_eq<mode>3): Likewise.
>         (avx2_gt<mode>3): Likewise.
>         (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
>         (*vec_extract<mode>): Likewise.
>         (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
>
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -25943,7 +25943,7 @@
>    "TARGET_RDRND"
>    "rdrand\t%0"
>    [(set_attr "type" "other")
> -   (set_attr "prefix_extra" "1")])
> +   (set_attr "prefix_0f" "1")])
>
>  (define_insn "@rdseed<mode>"
>    [(set (match_operand:SWI248 0 "register_operand" "=r")
> @@ -25953,7 +25953,7 @@
>    "TARGET_RDSEED"
>    "rdseed\t%0"
>    [(set_attr "type" "other")
> -   (set_attr "prefix_extra" "1")])
> +   (set_attr "prefix_0f" "1")])
>
>  (define_expand "pause"
>    [(set (match_dup 0)
> --- a/gcc/config/i386/mmx.md
> +++ b/gcc/config/i386/mmx.md
> @@ -2483,7 +2483,7 @@
>     vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
>    [(set_attr "isa" "noavx,noavx,avx")
>     (set_attr "type" "sseiadd")
> -   (set_attr "prefix_extra" "1,1,*")
> +   (set_attr "prefix_extra" "1")
>     (set_attr "prefix" "orig,orig,vex")
>     (set_attr "mode" "TI")])
>
> @@ -2532,7 +2532,7 @@
>     vp<maxmin_int>b\t{%2, %1, %0|%0, %1, %2}"
>    [(set_attr "isa" "noavx,noavx,avx")
>     (set_attr "type" "sseiadd")
> -   (set_attr "prefix_extra" "1,1,*")
> +   (set_attr "prefix_extra" "1")
>     (set_attr "prefix" "orig,orig,vex")
>     (set_attr "mode" "TI")])
>
> @@ -2561,7 +2561,7 @@
>     vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
>    [(set_attr "isa" "noavx,noavx,avx")
>     (set_attr "type" "sseiadd")
> -   (set_attr "prefix_extra" "1,1,*")
> +   (set_attr "prefix_extra" "1")
>     (set_attr "prefix" "orig,orig,vex")
>     (set_attr "mode" "TI")])
>
> @@ -2623,7 +2623,7 @@
>     vp<maxmin_int>w\t{%2, %1, %0|%0, %1, %2}"
>    [(set_attr "isa" "noavx,noavx,avx")
>     (set_attr "type" "sseiadd")
> -   (set_attr "prefix_extra" "1,1,*")
> +   (set_attr "prefix_extra" "1")
>     (set_attr "prefix" "orig,orig,vex")
>     (set_attr "mode" "TI")])
>
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -11064,7 +11064,7 @@
>                    (const_string "1")
>                    (const_string "*")))
>     (set (attr "prefix_extra")
> -     (if_then_else (eq_attr "alternative" "5,6,7,8,9")
> +     (if_then_else (eq_attr "alternative" "5,6,9")
>                    (const_string "1")
>                    (const_string "*")))
>     (set (attr "length_immediate")
> @@ -16779,7 +16779,7 @@
>     vp<maxmin_int><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
>    [(set_attr "isa" "noavx,noavx,avx")
>     (set_attr "type" "sseiadd")
> -   (set_attr "prefix_extra" "1,1,*")
> +   (set_attr "prefix_extra" "1")
>     (set_attr "prefix" "orig,orig,vex")
>     (set_attr "mode" "TI")])
>
> @@ -16813,7 +16813,10 @@
>    "TARGET_AVX2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
>    "vpcmpeq<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
>    [(set_attr "type" "ssecmp")
> -   (set_attr "prefix_extra" "1")
> +   (set (attr "prefix_extra")
> +     (if_then_else (eq (const_string "<MODE>mode") (const_string "V4DImode"))
> +                  (const_string "1")
> +                  (const_string "*")))
>     (set_attr "prefix" "vex")
>     (set_attr "mode" "OI")])
>
> @@ -17048,7 +17051,10 @@
>    "TARGET_AVX2"
>    "vpcmpgt<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
>    [(set_attr "type" "ssecmp")
> -   (set_attr "prefix_extra" "1")
> +   (set (attr "prefix_extra")
> +     (if_then_else (eq (const_string "<MODE>mode") (const_string "V4DImode"))
> +                  (const_string "1")
> +                  (const_string "*")))
>     (set_attr "prefix" "vex")
>     (set_attr "mode" "OI")])
>
> @@ -18843,7 +18849,7 @@
>         (const_string "*")))
>     (set (attr "prefix_extra")
>       (if_then_else
> -       (and (not (match_test "TARGET_AVX"))
> +       (ior (eq_attr "prefix" "evex")
>             (match_test "GET_MODE_NUNITS (<MODE>mode) == 8"))
>         (const_string "*")
>         (const_string "1")))
> @@ -20004,8 +20010,7 @@
>     (set_attr "prefix_data16" "1")
>     (set (attr "prefix_extra")
>       (if_then_else
> -       (and (eq_attr "alternative" "0,2")
> -           (eq (const_string "<MODE>mode") (const_string "V8HImode")))
> +       (eq (const_string "<MODE>mode") (const_string "V8HImode"))
>         (const_string "*")
>         (const_string "1")))
>     (set_attr "length_immediate" "1")
> @@ -22349,7 +22354,7 @@
>    "%vmovntdqa\t{%1, %0|%0, %1}"
>    [(set_attr "isa" "noavx,noavx,avx")
>     (set_attr "type" "ssemov")
> -   (set_attr "prefix_extra" "1,1,*")
> +   (set_attr "prefix_extra" "1")
>     (set_attr "prefix" "orig,orig,maybe_evex")
>     (set_attr "mode" "<sseinsnmode>")])
>
>
diff mbox series

Patch

--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -25943,7 +25943,7 @@ 
   "TARGET_RDRND"
   "rdrand\t%0"
   [(set_attr "type" "other")
-   (set_attr "prefix_extra" "1")])
+   (set_attr "prefix_0f" "1")])
 
 (define_insn "@rdseed<mode>"
   [(set (match_operand:SWI248 0 "register_operand" "=r")
@@ -25953,7 +25953,7 @@ 
   "TARGET_RDSEED"
   "rdseed\t%0"
   [(set_attr "type" "other")
-   (set_attr "prefix_extra" "1")])
+   (set_attr "prefix_0f" "1")])
 
 (define_expand "pause"
   [(set (match_dup 0)
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -2483,7 +2483,7 @@ 
    vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,noavx,avx")
    (set_attr "type" "sseiadd")
-   (set_attr "prefix_extra" "1,1,*")
+   (set_attr "prefix_extra" "1")
    (set_attr "prefix" "orig,orig,vex")
    (set_attr "mode" "TI")])
 
@@ -2532,7 +2532,7 @@ 
    vp<maxmin_int>b\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,noavx,avx")
    (set_attr "type" "sseiadd")
-   (set_attr "prefix_extra" "1,1,*")
+   (set_attr "prefix_extra" "1")
    (set_attr "prefix" "orig,orig,vex")
    (set_attr "mode" "TI")])
 
@@ -2561,7 +2561,7 @@ 
    vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,noavx,avx")
    (set_attr "type" "sseiadd")
-   (set_attr "prefix_extra" "1,1,*")
+   (set_attr "prefix_extra" "1")
    (set_attr "prefix" "orig,orig,vex")
    (set_attr "mode" "TI")])
 
@@ -2623,7 +2623,7 @@ 
    vp<maxmin_int>w\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "isa" "noavx,noavx,avx")
    (set_attr "type" "sseiadd")
-   (set_attr "prefix_extra" "1,1,*")
+   (set_attr "prefix_extra" "1")
    (set_attr "prefix" "orig,orig,vex")
    (set_attr "mode" "TI")])
 
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -11064,7 +11064,7 @@ 
 		   (const_string "1")
 		   (const_string "*")))
    (set (attr "prefix_extra")
-     (if_then_else (eq_attr "alternative" "5,6,7,8,9")
+     (if_then_else (eq_attr "alternative" "5,6,9")
 		   (const_string "1")
 		   (const_string "*")))
    (set (attr "length_immediate")
@@ -16779,7 +16779,7 @@ 
    vp<maxmin_int><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
   [(set_attr "isa" "noavx,noavx,avx")
    (set_attr "type" "sseiadd")
-   (set_attr "prefix_extra" "1,1,*")
+   (set_attr "prefix_extra" "1")
    (set_attr "prefix" "orig,orig,vex")
    (set_attr "mode" "TI")])
 
@@ -16813,7 +16813,10 @@ 
   "TARGET_AVX2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
   "vpcmpeq<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecmp")
-   (set_attr "prefix_extra" "1")
+   (set (attr "prefix_extra")
+     (if_then_else (eq (const_string "<MODE>mode") (const_string "V4DImode"))
+		   (const_string "1")
+		   (const_string "*")))
    (set_attr "prefix" "vex")
    (set_attr "mode" "OI")])
 
@@ -17048,7 +17051,10 @@ 
   "TARGET_AVX2"
   "vpcmpgt<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "ssecmp")
-   (set_attr "prefix_extra" "1")
+   (set (attr "prefix_extra")
+     (if_then_else (eq (const_string "<MODE>mode") (const_string "V4DImode"))
+		   (const_string "1")
+		   (const_string "*")))
    (set_attr "prefix" "vex")
    (set_attr "mode" "OI")])
 
@@ -18843,7 +18849,7 @@ 
        (const_string "*")))
    (set (attr "prefix_extra")
      (if_then_else
-       (and (not (match_test "TARGET_AVX"))
+       (ior (eq_attr "prefix" "evex")
 	    (match_test "GET_MODE_NUNITS (<MODE>mode) == 8"))
        (const_string "*")
        (const_string "1")))
@@ -20004,8 +20010,7 @@ 
    (set_attr "prefix_data16" "1")
    (set (attr "prefix_extra")
      (if_then_else
-       (and (eq_attr "alternative" "0,2")
-	    (eq (const_string "<MODE>mode") (const_string "V8HImode")))
+       (eq (const_string "<MODE>mode") (const_string "V8HImode"))
        (const_string "*")
        (const_string "1")))
    (set_attr "length_immediate" "1")
@@ -22349,7 +22354,7 @@ 
   "%vmovntdqa\t{%1, %0|%0, %1}"
   [(set_attr "isa" "noavx,noavx,avx")
    (set_attr "type" "ssemov")
-   (set_attr "prefix_extra" "1,1,*")
+   (set_attr "prefix_extra" "1")
    (set_attr "prefix" "orig,orig,maybe_evex")
    (set_attr "mode" "<sseinsnmode>")])