diff mbox series

[08/10] x86: add missing "prefix" attribute to VF{,C}MULC

Message ID 0e7fcac5-63aa-7e79-086d-b3ecbefbcaff@suse.com
State New
Headers show
Series x86: (mainly) "prefix_extra" adjustments | expand

Commit Message

Jan Beulich Aug. 3, 2023, 8:13 a.m. UTC 
gcc/

	* config/i386/sse.md
	(<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
	"prefix" attribute.
	(avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
	Likewise.
---
Talking of "prefix": Shouldn't at least V32HF and V32BF have it also
default to "evex"? (It won't matter right here, but it may matter
elsewhere.)

Comments

Hongtao Liu Aug. 4, 2023, 1:57 a.m. UTC | #1 
On Thu, Aug 3, 2023 at 4:16 PM Jan Beulich via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> gcc/
>
>         * config/i386/sse.md
>         (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
>         "prefix" attribute.
>         (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
>         Likewise.
Ok.
> ---
> Talking of "prefix": Shouldn't at least V32HF and V32BF have it also
> default to "evex"? (It won't matter right here, but it may matter
> elsewhere.)
>
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -6790,6 +6790,7 @@
>    return "v<complexopname><ssemodesuffix>\t{<round_maskc_op3>%2, %1, %0<maskc_operand3>|%0<maskc_operand3>, %1, %2<round_maskc_op3>}";
>  }
>    [(set_attr "type" "ssemul")
> +   (set_attr "prefix" "evex")
>     (set_attr "mode" "<MODE>")])
>
>  (define_expand "avx512fp16_fmaddcsh_v8hf_maskz<round_expand_name>"
> @@ -6993,6 +6994,7 @@
>    return "v<complexopname>sh\t{<round_scalarc_mask_op3>%2, %1, %0<mask_scalarc_operand3>|%0<mask_scalarc_operand3>, %1, %2<round_scalarc_mask_op3>}";
>  }
>    [(set_attr "type" "ssemul")
> +   (set_attr "prefix" "evex")
>     (set_attr "mode" "V8HF")])
>
>  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
>
diff mbox series

Patch

--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6790,6 +6790,7 @@ 
   return "v<complexopname><ssemodesuffix>\t{<round_maskc_op3>%2, %1, %0<maskc_operand3>|%0<maskc_operand3>, %1, %2<round_maskc_op3>}";
 }
   [(set_attr "type" "ssemul")
+   (set_attr "prefix" "evex")
    (set_attr "mode" "<MODE>")])
 
 (define_expand "avx512fp16_fmaddcsh_v8hf_maskz<round_expand_name>"
@@ -6993,6 +6994,7 @@ 
   return "v<complexopname>sh\t{<round_scalarc_mask_op3>%2, %1, %0<mask_scalarc_operand3>|%0<mask_scalarc_operand3>, %1, %2<round_scalarc_mask_op3>}";
 }
   [(set_attr "type" "ssemul")
+   (set_attr "prefix" "evex")
    (set_attr "mode" "V8HF")])
 
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