diff mbox series

[rs6000] Fix instruction counts on powerpc64 test cases. (take 2)

Message ID 56758a78-ac0d-e385-1da6-f41db365f13b@linux.vnet.ibm.com
State New
Headers show
Series [rs6000] Fix instruction counts on powerpc64 test cases. (take 2) | expand

Commit Message

Bill Seurer Feb. 5, 2019, 8:14 p.m. UTC 
[PATCH, rs6000] Fix instruction counts on powerpc64 test cases.

This patch fixes the assembler instruction counts for some test cases
that started failing due to changes in code generation.  The targets
were adjusted a bit as well to avoid generating BE/LE endian code on
unsupported platforms.

Bootstrapped and tested on powerpc64le-unknown-linux-gnu (power 8 and
power 9) and powerpc64be-unknown-linux-gnu (power 7 and power 8) with
no regressions.  Is this ok for trunk?


2019-02-04  Bill Seurer  <seurer@linux.vnet.ibm.com>

	* gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c: Update 
	instruction counts and target.
	* gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c: Update 
	instruction counts and target.
	* gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c: Update 
	instruction counts and target.

Comments

Segher Boessenkool Feb. 6, 2019, 11:17 a.m. UTC | #1 
Hi Bill,

On Tue, Feb 05, 2019 at 02:14:16PM -0600, Bill Seurer wrote:
> [PATCH, rs6000] Fix instruction counts on powerpc64 test cases.
> 
> This patch fixes the assembler instruction counts for some test cases
> that started failing due to changes in code generation.  The targets
> were adjusted a bit as well to avoid generating BE/LE endian code on
> unsupported platforms.

> 	* gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c: Update 
> 	instruction counts and target.

(Trailing space after "Update").

>  /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
>  /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
> -/* { dg-final { scan-assembler-times "xxlnor" 8 { target le } } } */
> -/* { dg-final { scan-assembler-times "xxlnor" 7 { target be } } } */
> -/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 { target le } } } */
> -/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target be }} } */
> -/* { dg-final { scan-assembler-times "xvcmpeqdp." 5 { target le } } } */
> -/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target be } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgtdp" 9 { target le } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target be } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgtdp." 9 { target le } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target be } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgedp" 6 { target le } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgedp" 7 { target be } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgedp." 6 { target le } } } */
> -/* { dg-final { scan-assembler-times "xvcmpgedp." 7 { target be } } } */
> +/* { dg-final { scan-assembler-times "xxlnor" 5 } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 5 } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 1 } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */
>  /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
>  /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
>  /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */

As a future cleanup / robustification, all the other insns could use \m
and \M as well.  For example xxlor would match xxlorc.  I don't know if
there are currently any possible conflicts, but :-)

> Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c
> ===================================================================
> --- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c	(revision 268524)
> +++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c	(working copy)
> @@ -1,16 +1,15 @@
> -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
> +/* { dg-do compile { target { lp64 } } } */

No braces around "lp64" please.  They are needed when there is more than
one selector in there, in an expression with && or whatnot (this is parsed
by custom code, not by the tcl parser).

> +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 { target le } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 { target le } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 { target be } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 { target be } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 { target le } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 { target le } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 { target be } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 { target be } } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 2 } } */
> +/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 4 } } */

"le" and "be" are now identical, so unify them?

> --- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c	(revision 268524)
> +++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c	(working copy)
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
> +/* { dg-do compile { target { lp64 && le } } } */
>  /* { dg-skip-if "" { powerpc*-*-darwin* } } */
>  /* { dg-require-effective-target powerpc_p9vector_ok } */
>  /* { dg-options "-mvsx -O2 -mcpu=power9" } */

I don't know if we should limit the p9 testcases to LE only.  If no one
ever tests GCC on p9 BE, leaving out the "le" works fine; and if people
_do_ test on it, we will want to know if it doesn't work.

Okay for trunk with those things fixed.  (The \m\M thing isn't required of
course).  Thanks!


Segher
diff mbox series

Patch

Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c	(revision 268524)
+++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c	(working copy)
@@ -1,28 +1,20 @@ 
-/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-do compile { target { lp64 && be } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-mvsx -O2 -mcpu=power7 -dp" } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
 
-
 /* Expected instruction counts for Power 7 */
 
 /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
 /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 8 { target le } } } */
-/* { dg-final { scan-assembler-times "xxlnor" 7 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target be }} } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp." 5 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp" 9 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp." 9 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp" 6 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp" 7 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp." 6 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp." 7 { target be } } } */
+/* { dg-final { scan-assembler-times "xxlnor" 5 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 5 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 1 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */
 /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
 /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
 /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c	(revision 268524)
+++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c	(working copy)
@@ -1,16 +1,15 @@ 
-/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-do compile { target { lp64 } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-mvsx -O2 -mcpu=power8" } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
 
-
 /* Expected instruction counts for Power 8.  */
 
 /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
 /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 8 { target le } } } */
-/* { dg-final { scan-assembler-times "xxlnor" 7 { target be } } } */
+/* { dg-final { scan-assembler-times "xxlnor" 6 { target le } } } */
+/* { dg-final { scan-assembler-times "xxlnor" 5 { target be } } } */
 
 /* We generate xxlor instructions for many reasons other than or'ing vector
    operands or calling __builtin_vec_or(), which  means we cannot rely on
@@ -18,16 +17,16 @@ 
    xxlor instruction was generated.  */
 /* { dg-final { scan-assembler "xxlor" } } */
 
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 4 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp." 4 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp" 7 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp." 7 { target le } } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target be } } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 { target le } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 { target le } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 { target be } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 { target be } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 { target le } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 { target le } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 { target be } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 { target be } } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 2 } } */
+/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 4 } } */
 /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
 /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
 /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c	(revision 268524)
+++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c	(working copy)
@@ -1,4 +1,4 @@ 
-/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-do compile { target { lp64 && le } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-mvsx -O2 -mcpu=power9" } */
@@ -8,7 +8,7 @@ 
 
 /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
 /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 7 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 5 } } */
 
 /* We generate xxlor instructions for many reasons other than or'ing vector
    operands or calling __builtin_vec_or(), which  means we cannot rely on