diff mbox series

RISC-V: Fix vmnot asm check (Should check vmnot.m instead of vmnot.mm)

Message ID 20230216033428.16157-1-juzhe.zhong@rivai.ai
State New
Headers show
Series RISC-V: Fix vmnot asm check (Should check vmnot.m instead of vmnot.mm) | expand

Commit Message

juzhe.zhong@rivai.ai Feb. 16, 2023, 3:34 a.m. UTC 
From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/base/binop_vx_constraint-148.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-149.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-150.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-151.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-152.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-153.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-156.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-157.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-159.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-160.c: Change vmnot.mm to vmnot.m.
        * gcc.target/riscv/rvv/base/binop_vx_constraint-161.c: Change vmnot.mm to vmnot.m.

---
 .../riscv/rvv/base/binop_vx_constraint-148.c           |  2 +-
 .../riscv/rvv/base/binop_vx_constraint-149.c           |  2 +-
 .../riscv/rvv/base/binop_vx_constraint-150.c           |  2 +-
 .../riscv/rvv/base/binop_vx_constraint-151.c           |  2 +-
 .../riscv/rvv/base/binop_vx_constraint-152.c           |  2 +-
 .../riscv/rvv/base/binop_vx_constraint-153.c           |  6 +++---
 .../riscv/rvv/base/binop_vx_constraint-156.c           |  6 +++---
 .../riscv/rvv/base/binop_vx_constraint-157.c           | 10 +++++-----
 .../riscv/rvv/base/binop_vx_constraint-159.c           |  6 +++---
 .../riscv/rvv/base/binop_vx_constraint-160.c           | 10 +++++-----
 .../riscv/rvv/base/binop_vx_constraint-161.c           |  4 ++--
 11 files changed, 26 insertions(+), 26 deletions(-)
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c
index c48134bc553..0c66a60ce74 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c
@@ -16,5 +16,5 @@  void f1 (void * in, void *out, int32_t x)
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 1 } } */
 /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */
-/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */
+/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */
 /* { dg-final { scan-assembler-not {vmv} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c
index 7ba1a14aab6..f745b967c11 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c
@@ -15,5 +15,5 @@  void f1 (void * in, void *out, int32_t x)
 
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 2 } } */
 /* { dg-final { scan-assembler-times {vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */
-/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */
+/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */
 /* { dg-final { scan-assembler-not {vmv} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c
index 6282fb48105..55a222f47ea 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c
@@ -17,5 +17,5 @@  void f1 (void * in, void *out, int32_t x)
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 1 } } */
 /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */
-/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */
+/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */
 /* { dg-final { scan-assembler-times {vmv} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c
index a2aa633aef7..49f697d8c35 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c
@@ -16,5 +16,5 @@  void f1 (void * in, void *out, int32_t x)
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 1 } } */
 /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */
-/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */
+/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */
 /* { dg-final { scan-assembler-times {vmv} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c
index 1bd751564ab..ef13aa54230 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c
@@ -17,4 +17,4 @@  void f1 (void * in, void *out, int32_t x)
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */
 /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 2 } } */
 /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 2 } } */
-/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */
+/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c
index 5a3d475e3d8..a941bcd3181 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c
@@ -9,7 +9,7 @@ 
 **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
 **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
 **	vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	vsm\.v\tv[0-9]+,0\([a-x0-9]+\)
@@ -32,7 +32,7 @@  void f1 (void * in, void * in2, void *out, int32_t x)
 **	vle32.v\tv[0-9]+,0\([a-x0-9]+\)
 **	vle32.v\tv[0-9]+,0\([a-x0-9]+\),v0.t
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[1-9][0-9]?,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	vsm.v\tv[0-9]+,0\([a-x0-9]+\)
@@ -57,7 +57,7 @@  void f2 (void * in, void *out, int32_t x)
 **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
 **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\),v0.t
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	vsm.v\tv[0-9]+,0\([a-x0-9]+\)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c
index e2e75709709..39a46759768 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c
@@ -7,7 +7,7 @@ 
 ** f1:
 **	...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
 **	vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	...
@@ -26,7 +26,7 @@  void f1 (void * in, void * in2, void *out, int32_t x)
 ** f2:
 **	...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[1-9][0-9]?,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	...
@@ -47,7 +47,7 @@  void f2 (void * in, void *out, int32_t x)
 ** f3:
 **	...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	...
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c
index 2a9cb6eb6b4..3870971a954 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c
@@ -41,7 +41,7 @@  void f1 (void * in, void *out, int64_t x, int n)
 ** f2:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -60,7 +60,7 @@  void f2 (void * in, void *out, int64_t x, int n)
 ** f3:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -79,7 +79,7 @@  void f3 (void * in, void *out, int64_t x, int n)
 ** f4:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -98,7 +98,7 @@  void f4 (void * in, void *out, int64_t x, int n)
 ** f5:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -117,7 +117,7 @@  void f5 (void * in, void *out, int64_t x, int n)
 ** f6:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c
index e2e75709709..39a46759768 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c
@@ -7,7 +7,7 @@ 
 ** f1:
 **	...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
 **	vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	...
@@ -26,7 +26,7 @@  void f1 (void * in, void * in2, void *out, int32_t x)
 ** f2:
 **	...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[1-9][0-9]?,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	...
@@ -47,7 +47,7 @@  void f2 (void * in, void *out, int32_t x)
 ** f3:
 **	...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **	...
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c
index 2a9cb6eb6b4..3870971a954 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c
@@ -41,7 +41,7 @@  void f1 (void * in, void *out, int64_t x, int n)
 ** f2:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -60,7 +60,7 @@  void f2 (void * in, void *out, int64_t x, int n)
 ** f3:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -79,7 +79,7 @@  void f3 (void * in, void *out, int64_t x, int n)
 ** f4:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -98,7 +98,7 @@  void f4 (void * in, void *out, int64_t x, int n)
 ** f5:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -117,7 +117,7 @@  void f5 (void * in, void *out, int64_t x, int n)
 ** f6:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c
index d95c7c6b6d4..815f8a7db29 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c
@@ -41,7 +41,7 @@  void f1 (void * in, void *out, int64_t x, int n)
 ** f2:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...
@@ -60,7 +60,7 @@  void f2 (void * in, void *out, int64_t x, int n)
 ** f3:
 **  ...
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+
-**  vmnot\.mm\s+v[0-9]+,\s*v[0-9]+
+**  vmnot\.m\s+v[0-9]+,\s*v[0-9]+
 **	vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t
 **	vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+
 **  ...