From patchwork Thu Feb 16 03:34:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 1743282 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PHLDH0MgQz23yD for ; Thu, 16 Feb 2023 14:34:53 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E283B385840D for ; Thu, 16 Feb 2023 03:34:50 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgsg1.qq.com (smtpbgsg1.qq.com [54.254.200.92]) by sourceware.org (Postfix) with ESMTPS id 116063858D33 for ; Thu, 16 Feb 2023 03:34:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 116063858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp72t1676518469td7mnul5 Received: from server1.localdomain ( [58.60.1.22]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 16 Feb 2023 11:34:28 +0800 (CST) X-QQ-SSF: 01400000000000E0M000000A0000000 X-QQ-FEAT: bhet8yMU7vlnnPqbpsoRqMurHQxDpv+e906fWgkexbI1vKqaQu95hwuVWnI31 ZoXQbd/KnHPZ4VD49c23l68DQxuLZMRk1N+v3Kd+tSqDvzJChbcpw13jTaFXCwpwvoxoy8q 7gl0XfQRgmlZqHqPXJsZMgmnE59yjd+T1ldv51ypsvaHwtetUoA53xSSd7arIlYWe+NCTyH SJIUgGKzaFcsgU7vKn0UhIZgFGgViElthIkPe8n6TNLdkGr3WCQh49213Biz88EVN0nQJMn Kk5vio4lkWXS0eg/MrIXSpWy2laofw4egy+iyFJf3wUgp9miHY4qM9Xs4mWPUrMBqxdl21e V/GPDa69Y2dLJAwGs+J7q5Ms6HvC0Spb0rOgYsf9KnxT2eaPENchvZ6lLPl3IL3EJN+LhhN X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Fix vmnot asm check (Should check vmnot.m instead of vmnot.mm) Date: Thu, 16 Feb 2023 11:34:28 +0800 Message-Id: <20230216033428.16157-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/binop_vx_constraint-148.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-149.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-150.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-151.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-152.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-153.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-156.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-157.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-159.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-160.c: Change vmnot.mm to vmnot.m. * gcc.target/riscv/rvv/base/binop_vx_constraint-161.c: Change vmnot.mm to vmnot.m. --- .../riscv/rvv/base/binop_vx_constraint-148.c | 2 +- .../riscv/rvv/base/binop_vx_constraint-149.c | 2 +- .../riscv/rvv/base/binop_vx_constraint-150.c | 2 +- .../riscv/rvv/base/binop_vx_constraint-151.c | 2 +- .../riscv/rvv/base/binop_vx_constraint-152.c | 2 +- .../riscv/rvv/base/binop_vx_constraint-153.c | 6 +++--- .../riscv/rvv/base/binop_vx_constraint-156.c | 6 +++--- .../riscv/rvv/base/binop_vx_constraint-157.c | 10 +++++----- .../riscv/rvv/base/binop_vx_constraint-159.c | 6 +++--- .../riscv/rvv/base/binop_vx_constraint-160.c | 10 +++++----- .../riscv/rvv/base/binop_vx_constraint-161.c | 4 ++-- 11 files changed, 26 insertions(+), 26 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c index c48134bc553..0c66a60ce74 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-148.c @@ -16,5 +16,5 @@ void f1 (void * in, void *out, int32_t x) /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */ /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 1 } } */ /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */ -/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */ /* { dg-final { scan-assembler-not {vmv} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c index 7ba1a14aab6..f745b967c11 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-149.c @@ -15,5 +15,5 @@ void f1 (void * in, void *out, int32_t x) /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 2 } } */ /* { dg-final { scan-assembler-times {vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */ -/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */ /* { dg-final { scan-assembler-not {vmv} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c index 6282fb48105..55a222f47ea 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-150.c @@ -17,5 +17,5 @@ void f1 (void * in, void *out, int32_t x) /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */ /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 1 } } */ /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */ -/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */ /* { dg-final { scan-assembler-times {vmv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c index a2aa633aef7..49f697d8c35 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-151.c @@ -16,5 +16,5 @@ void f1 (void * in, void *out, int32_t x) /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */ /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 1 } } */ /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 1 } } */ -/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */ /* { dg-final { scan-assembler-times {vmv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c index 1bd751564ab..ef13aa54230 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-152.c @@ -17,4 +17,4 @@ void f1 (void * in, void *out, int32_t x) /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+\s+} 1 } } */ /* { dg-final { scan-assembler-times {vmslt\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t} 2 } } */ /* { dg-final { scan-assembler-times {vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vmnot\.mm\s+v[0-9]+,\s*v[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vmnot\.m\s+v[0-9]+,\s*v[0-9]+} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c index 5a3d475e3d8..a941bcd3181 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-153.c @@ -9,7 +9,7 @@ ** vle32\.v\tv[0-9]+,0\([a-x0-9]+\) ** vle32\.v\tv[0-9]+,0\([a-x0-9]+\) ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ ** vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** vsm\.v\tv[0-9]+,0\([a-x0-9]+\) @@ -32,7 +32,7 @@ void f1 (void * in, void * in2, void *out, int32_t x) ** vle32.v\tv[0-9]+,0\([a-x0-9]+\) ** vle32.v\tv[0-9]+,0\([a-x0-9]+\),v0.t ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[1-9][0-9]?,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** vsm.v\tv[0-9]+,0\([a-x0-9]+\) @@ -57,7 +57,7 @@ void f2 (void * in, void *out, int32_t x) ** vle32\.v\tv[0-9]+,0\([a-x0-9]+\) ** vle32\.v\tv[0-9]+,0\([a-x0-9]+\),v0.t ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** vsm.v\tv[0-9]+,0\([a-x0-9]+\) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c index e2e75709709..39a46759768 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-156.c @@ -7,7 +7,7 @@ ** f1: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ ** vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -26,7 +26,7 @@ void f1 (void * in, void * in2, void *out, int32_t x) ** f2: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[1-9][0-9]?,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -47,7 +47,7 @@ void f2 (void * in, void *out, int32_t x) ** f3: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c index 2a9cb6eb6b4..3870971a954 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-157.c @@ -41,7 +41,7 @@ void f1 (void * in, void *out, int64_t x, int n) ** f2: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -60,7 +60,7 @@ void f2 (void * in, void *out, int64_t x, int n) ** f3: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -79,7 +79,7 @@ void f3 (void * in, void *out, int64_t x, int n) ** f4: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -98,7 +98,7 @@ void f4 (void * in, void *out, int64_t x, int n) ** f5: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -117,7 +117,7 @@ void f5 (void * in, void *out, int64_t x, int n) ** f6: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c index e2e75709709..39a46759768 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-159.c @@ -7,7 +7,7 @@ ** f1: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ ** vmandn\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -26,7 +26,7 @@ void f1 (void * in, void * in2, void *out, int32_t x) ** f2: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[1-9][0-9]?,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -47,7 +47,7 @@ void f2 (void * in, void *out, int32_t x) ** f3: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,\s*v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c index 2a9cb6eb6b4..3870971a954 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-160.c @@ -41,7 +41,7 @@ void f1 (void * in, void *out, int64_t x, int n) ** f2: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -60,7 +60,7 @@ void f2 (void * in, void *out, int64_t x, int n) ** f3: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -79,7 +79,7 @@ void f3 (void * in, void *out, int64_t x, int n) ** f4: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -98,7 +98,7 @@ void f4 (void * in, void *out, int64_t x, int n) ** f5: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -117,7 +117,7 @@ void f5 (void * in, void *out, int64_t x, int n) ** f6: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c index d95c7c6b6d4..815f8a7db29 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-161.c @@ -41,7 +41,7 @@ void f1 (void * in, void *out, int64_t x, int n) ** f2: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ... @@ -60,7 +60,7 @@ void f2 (void * in, void *out, int64_t x, int n) ** f3: ** ... ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+ -** vmnot\.mm\s+v[0-9]+,\s*v[0-9]+ +** vmnot\.m\s+v[0-9]+,\s*v[0-9]+ ** vmslt\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+,v0.t ** vmxor\.mm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+ ** ...