Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[AArch64] Handle FLOAT and UNSIGNED_FLOAT in rtx costs 0 0 0 2015-05-01 Kyrylo Tkachov New
[AArch64] Handle SYMBOL_SMALL_TPREL appropriately 0 0 0 2015-02-02 Hurugalawadi, Naveen New
[AArch64] Handle fcvta[su] and frint in RTX cost function 0 0 0 2014-07-10 Kyrylo Tkachov New
[AArch64] Handle symbol + offset more effectively 0 0 0 2012-09-25 Ian Bolton New
[AArch64] Handle wrong cost for addition of minus immediate in aarch64_rtx_costs. 0 0 0 2015-06-26 Bin Cheng New
[AArch64] Implement %c output template 0 0 0 2013-10-17 Kyrylo Tkachov New
[AArch64] Implement -fpic for -mcmodel=small 0 0 0 2015-05-20 Jiong Wang New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-22 Kyrylo Tkachov New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-22 Kyrylo Tkachov New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-20 Kyrylo Tkachov New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-06-23 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-05-16 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-03-28 James Greenhalgh New
[AArch64] Implement Bitwise AND and Set Flags 0 0 0 2013-01-29 Hurugalawadi, Naveen New
[AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE 0 0 0 2014-05-12 Ian Bolton New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-01-30 Hurugalawadi, Naveen New
[AArch64] Implement TARGET_GIMPLE_FOLD_BUILTIN for aarch64 backend. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-13 Kyrylo Tkachov New
[AArch64] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-11 Kyrylo Tkachov New
[AArch64] Implement TARGET_SHIFT_TRUNCATION_MASK. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Implement Vector Permute Support 0 0 0 2014-01-16 Alex Velenko New
[AArch64] Implement Vector Permute Support 0 0 0 2014-01-14 Alex Velenko New
[AArch64] Implement Vector Permute Support 0 0 0 2012-12-04 James Greenhalgh New
[AArch64] Implement adrp+add fusion 0 0 0 2014-11-12 Kyrylo Tkachov New
[AArch64] Implement bswaphi2 with rev16 0 0 0 2012-11-16 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ffs standard pattern 0 0 0 2012-09-14 Ian Bolton New
[AArch64] Implement fnma, fms and fnms standard patterns 0 0 0 2012-09-14 Ian Bolton New
[AArch64] Implement framework for Tree/Gimple Implementation of NEON intrinsics. 0 0 0 2013-03-14 Tejas Belagod New
[AArch64] Implement framework for Tree/Gimple Implementation of NEON intrinsics. 0 0 0 2013-03-14 Tejas Belagod New
[AArch64] Implement movmem for the benefit of inline memcpy 0 0 0 2014-08-05 Andrew Pinski New
[AArch64] Implement movmem for the benefit of inline memcpy 0 0 0 2014-06-06 James Greenhalgh New
[AArch64] Implement section anchors 0 0 0 2012-09-06 James Greenhalgh New
[AArch64] Implement some saturating math NEON intrinsics 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Implement some vca*_f[32,64] intrinsics 0 0 0 2014-07-10 Kyrylo Tkachov New
[AArch64] Implement some vca*_f[32,64] intrinsics 0 0 0 2014-06-23 Kyrylo Tkachov New
[AArch64] Implement some vmul*_lane*_f* intrinsics in arm_neon.h 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Implement support for LD1R. 0 0 0 2013-01-09 Tejas Belagod New
[AArch64] Implement support for LD{1,2,3,4}/ST{1,2,3,4}. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Implement vbsl_f64 arm_neon.h intrinsic 0 0 0 2014-07-16 Kyrylo Tkachov New
[AArch64] Implement vcopy intrinsics. 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Implement vec_init. 0 0 0 2013-01-07 Tejas Belagod New
[AArch64] Implement vector float->double widening and double->float narrowing. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Implement vfma_f64, vmla_f64, vfms_f64, vmls_f64 intrinsics 0 0 0 2014-06-20 Kyrylo Tkachov New
[AArch64] Implement vmovq_n_f64. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Implement vmul<q>_lane<q>_<fsu><16,32,64> intrinsics in C 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Implement vset_lane intrinsics in C 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Implement vsqrt_f64 intrinsic 0 0 0 2014-11-27 Kyrylo Tkachov New
[AArch64] Implement vsqrt_f64 intrinsic 0 0 0 2014-11-17 Kyrylo Tkachov New
[AArch64] Implement workaround for ARM Cortex-A53 erratum 835769 0 0 0 2014-10-10 Kyrylo Tkachov New
[AArch64] Implementent sync gen and atomic builtins. 0 0 0 2012-11-16 James Greenhalgh New
[AArch64] Improve TARGET_LEGITIMIZE_ADDRESS_P hook 0 0 0 2014-08-01 Jiong Wang New
[AArch64] Improve TARGET_LEGITIMIZE_ADDRESS_P hook 0 0 0 2014-08-01 Jiong Wang New
[AArch64] Improve TLS Descriptor pattern to release RTL loop IV opt 0 0 0 2015-07-28 Jiong Wang New
[AArch64] Improve arm_neon.h vml<as>_lane handling. 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Improve bit-test-branch pattern to avoid unnecessary register clobber 0 0 0 2015-01-27 Jiong Wang New
[AArch64] Improve bit-test-branch pattern to avoid unnecessary register clobber 0 0 0 2015-01-19 Jiong Wang New
[AArch64] Improve bit-test-branch pattern to avoid unnecessary register clobber 0 0 0 2015-01-19 Jiong Wang New
[AArch64] Improve bit-test-branch pattern to avoid unnecessary register clobber 0 0 0 2014-12-15 Jiong Wang New
[AArch64] Improve csinc/csneg/csinv opportunities on immediates 0 0 0 2015-07-10 Kyrylo Tkachov New
[AArch64] Improve description of <F>CM instructions in RTL 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Improve handling of constants destined for FP_REGS 0 0 0 2013-09-04 Ian Bolton New
[AArch64] Improve spill code - swap order in shl pattern 0 0 0 2015-04-27 Wilco New
[AArch64] Improve spill code - swap order in shr patterns 0 0 0 2015-07-27 Wilco New
[AArch64] Improve vst4_lane intrinsics 0 0 0 2014-02-13 James Greenhalgh New
[AArch64] Increase static buffer size in aarch64_rewrite_selected_cpu 0 0 0 2015-04-20 Kyrylo Tkachov New
[AArch64] LINK_SPEC changes for Cortex-A53 erratum 835769 workaround 0 0 0 2014-10-22 Kyrylo Tkachov New
[AArch64] LR register not used in leaf functions 0 0 0 2014-09-30 Jiong Wang New
[AArch64] LR register not used in leaf functions 0 0 0 2014-09-22 Kugan New
[AArch64] Logical vector shift right conformance 0 0 0 2014-02-25 Alex Velenko New
[AArch64] Make -mcpu, -march and -mtune case-insensitive. 0 0 0 2014-01-17 Alan Lawrence New
[AArch64] Make <su>mull<q> target tests more robust. 0 0 0 2013-01-08 Tejas Belagod New
[AArch64] Make MOVK output operand 2 in hex 0 0 0 2013-03-20 Ian Bolton New
[AArch64] Make aarch64_min_divisions_for_recip_mul configurable 0 0 0 2015-05-01 Wilco New
[AArch64] Make aarch64_min_divisions_for_recip_mul configurable 0 0 0 2015-03-03 Wilco New
[AArch64] Make argument of ld1 intrinsics const. 0 0 0 2013-01-07 James Greenhalgh New
[AArch64] Make gentune.sh also generate "generic_sched" attribute 0 0 0 2014-12-17 James Greenhalgh New
[AArch64] Make gentune.sh also generate "generic_sched" attribute 0 0 0 2014-09-25 James Greenhalgh New
[AArch64] Make integer vabs intrinsics UNSPECs 0 0 0 2015-01-28 James Greenhalgh New
[AArch64] Make omit-frame-pointer work correctly 0 0 0 2013-03-28 Ian Bolton New
[AArch64] Make reduc_* operations bigendian-safe. 0 0 0 2013-11-15 Tejas Belagod New
[AArch64] Make sure start callee-save offset for D registers aligned 0 0 0 2014-06-05 Jiong Wang New
[AArch64] Make vabs<q>_f<32, 64> a tree/gimple intrinsic. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Make zero_extends explicit for common SImode patterns 0 0 0 2012-12-14 Ian Bolton New
[AArch64] Make zero_extends explicit for common SImode patterns 0 0 0 2012-12-13 Ian Bolton New
[AArch64] Make zero_extends explicit for some SImode patterns 0 0 0 2013-01-15 Ian Bolton New
[AArch64] Map fcvt intrinsics to builtin name directly. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Map frint intrinsics to standard pattern names directly. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Map standard pattern names to NEON intrinsics directly. 0 0 0 2013-04-22 James Greenhalgh New
[AArch64] Minor refactoring of aarch64_add_offset 0 0 0 2013-06-25 Yufeng Zhang New
[AArch64] Minor refactoring of aarch64_force_temporary 0 0 0 2013-06-25 Yufeng Zhang New
[AArch64] Move immediate into Advanced SIMD scalar. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] NEON vadd_f64 and vsub_f64 intrinsics modified 0 0 0 2013-10-08 Alex Velenko New
[AArch64] NEON vclz intrinsic modified 0 0 0 2013-10-08 Alex Velenko New
[AArch64] NEON vdup testcases 0 0 0 2014-01-16 Alex Velenko New