diff mbox series

Introduce --param logical-op-non-short-circuit (PR testsuite/85368)

Message ID 20181130205036.GG12380@tucnak
State New
Headers show
Series Introduce --param logical-op-non-short-circuit (PR testsuite/85368) | expand

Commit Message

Jakub Jelinek Nov. 30, 2018, 8:50 p.m. UTC
Hi!

Until we stop depending on BRANCH_COST and LOGICAL_OP_NON_SHORT_CIRCUIT
macros at least for early GIMPLE, I'm afraid the current state for the
testsuite is terrible, on some targets it is enough to use
-mbranch-cost={1,2} to pick either of the setting, but other targets,
while they implement -mbranch-cost=, redefine LOGICAL_OP_NON_SHORT_CIRCUIT,
so it ignores BRANCH_COST altogether, or sometimes, other targets don't
implement -mbranch-cost= and have various complex definitions of BRANCH_COST
or LOGICAL_OP_NON_SHORT_CIRCUIT depending on other command line options.

The following patch introduces a new param (not an option, to make it
clearer it is intended primarily for the testsuite and we can more easily
remove it again) that overrides the target's LOGICAL_OP_NON_SHORT_CIRCUIT
and adjusts the testsuite to use it.

Bootstrapped/regtested on x86_64-linux and i686-linux, Christophe has kindly
tested it on ARM.  Ok for trunk?

2018-11-30  Jakub Jelinek  <jakub@redhat.com>

	PR testsuite/85368
	* params.def (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT): New param.
	* tree-ssa-ifcombine.c (ifcombine_ifandif): If
	--param logical-op-non-short-circuit is present, override
	LOGICAL_OP_NON_SHORT_CIRCUIT value from the param.
	* fold-const.c (fold_range_test, fold_truth_andor): Likewise.

	* lib/target-supports.exp (logical_op_short_circuit): Remove.
	* gcc.dg/builtin-bswap-7.c: Remove logical_op_short_circuit
	effective target, drop -mbranch-cost= options from the test and
	instead pass --param logical-op-non-short-circuit=0 or
	--param logical-op-non-short-circuit=1 depending on what the
	tests meant to test.
	* gcc.dg/pr21643.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
	* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
	* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
	* gcc.dg/tree-ssa/ssa-thread-14.c: Likewise.
	* gcc.dg/tree-ssa/vrp47.c: Likewise.
	* gcc.dg/tree-ssa/ssa-dom-thread-11.c: Likewise.
	* gcc.dg/tree-ssa/ssa-dom-thread-16.c: Likewise.
	* gcc.dg/tree-ssa/ssa-dom-thread-14.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
	* gcc.dg/tree-ssa/vrp87.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
	* gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
	* gcc.dg/tree-ssa/ssa-thread-11.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
	* gcc.dg/tree-ssa/forwprop-28.c: Likewise.
	* gcc.dg/binop-xor1.c: Likewise.
	* gcc.dg/pr46309.c: Likewise.
	* gcc.dg/tree-ssa/ssa-dom-thread-18.c: New test.
	* gcc.dg/tree-ssa/reassoc-32.c: Add
	--param logical-op-non-short-circuit=1 to dg-options.
	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.


	Jakub

Comments

Jeff Law Nov. 30, 2018, 11:15 p.m. UTC | #1
On 11/30/18 1:50 PM, Jakub Jelinek wrote:
> Hi!
> 
> Until we stop depending on BRANCH_COST and LOGICAL_OP_NON_SHORT_CIRCUIT
> macros at least for early GIMPLE, I'm afraid the current state for the
> testsuite is terrible, on some targets it is enough to use
> -mbranch-cost={1,2} to pick either of the setting, but other targets,
> while they implement -mbranch-cost=, redefine LOGICAL_OP_NON_SHORT_CIRCUIT,
> so it ignores BRANCH_COST altogether, or sometimes, other targets don't
> implement -mbranch-cost= and have various complex definitions of BRANCH_COST
> or LOGICAL_OP_NON_SHORT_CIRCUIT depending on other command line options.
> 
> The following patch introduces a new param (not an option, to make it
> clearer it is intended primarily for the testsuite and we can more easily
> remove it again) that overrides the target's LOGICAL_OP_NON_SHORT_CIRCUIT
> and adjusts the testsuite to use it.
> 
> Bootstrapped/regtested on x86_64-linux and i686-linux, Christophe has kindly
> tested it on ARM.  Ok for trunk?
> 
> 2018-11-30  Jakub Jelinek  <jakub@redhat.com>
> 
> 	PR testsuite/85368
> 	* params.def (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT): New param.
> 	* tree-ssa-ifcombine.c (ifcombine_ifandif): If
> 	--param logical-op-non-short-circuit is present, override
> 	LOGICAL_OP_NON_SHORT_CIRCUIT value from the param.
> 	* fold-const.c (fold_range_test, fold_truth_andor): Likewise.
> 
> 	* lib/target-supports.exp (logical_op_short_circuit): Remove.
> 	* gcc.dg/builtin-bswap-7.c: Remove logical_op_short_circuit
> 	effective target, drop -mbranch-cost= options from the test and
> 	instead pass --param logical-op-non-short-circuit=0 or
> 	--param logical-op-non-short-circuit=1 depending on what the
> 	tests meant to test.
> 	* gcc.dg/pr21643.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
> 	* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-thread-14.c: Likewise.
> 	* gcc.dg/tree-ssa/vrp47.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-dom-thread-11.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-dom-thread-16.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-dom-thread-14.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
> 	* gcc.dg/tree-ssa/vrp87.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
> 	* gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-thread-11.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
> 	* gcc.dg/tree-ssa/forwprop-28.c: Likewise.
> 	* gcc.dg/binop-xor1.c: Likewise.
> 	* gcc.dg/pr46309.c: Likewise.
> 	* gcc.dg/tree-ssa/ssa-dom-thread-18.c: New test.
> 	* gcc.dg/tree-ssa/reassoc-32.c: Add
> 	--param logical-op-non-short-circuit=1 to dg-options.
> 	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
> 	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
> 	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
> 	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
OK.

Jeff
diff mbox series

Patch

--- gcc/params.def.jj	2018-11-21 11:35:44.410041861 +0100
+++ gcc/params.def	2018-11-30 12:22:22.180688145 +0100
@@ -1360,6 +1360,11 @@  DEFPARAM(PARAM_AVOID_FMA_MAX_BITS,
 	 "Maximum number of bits for which we avoid creating FMAs.",
 	 0, 0, 512)
 
+DEFPARAM(PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT,
+	 "logical-op-non-short-circuit",
+	 "True if a non-short-circuit operation is optimal.",
+	 -1, -1, 1)
+
 /*
 
 Local variables:
--- gcc/tree-ssa-ifcombine.c.jj	2018-11-29 08:41:32.681757293 +0100
+++ gcc/tree-ssa-ifcombine.c	2018-11-30 12:29:42.936453120 +0100
@@ -40,6 +40,7 @@  along with GCC; see the file COPYING3.
 #include "gimplify-me.h"
 #include "tree-cfg.h"
 #include "tree-ssa.h"
+#include "params.h"
 
 #ifndef LOGICAL_OP_NON_SHORT_CIRCUIT
 #define LOGICAL_OP_NON_SHORT_CIRCUIT \
@@ -563,7 +564,11 @@  ifcombine_ifandif (basic_block inner_con
 	{
 	  tree t1, t2;
 	  gimple_stmt_iterator gsi;
-	  if (!LOGICAL_OP_NON_SHORT_CIRCUIT || flag_sanitize_coverage)
+	  bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT;
+	  if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1)
+	    logical_op_non_short_circuit
+	      = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT);
+	  if (!logical_op_non_short_circuit || flag_sanitize_coverage)
 	    return false;
 	  /* Only do this optimization if the inner bb contains only the conditional. */
 	  if (!gsi_one_before_end_p (gsi_start_nondebug_after_labels_bb (inner_cond_bb)))
--- gcc/fold-const.c.jj	2018-10-19 10:59:03.857467657 +0200
+++ gcc/fold-const.c	2018-11-30 12:27:50.739294835 +0100
@@ -5572,12 +5572,15 @@  fold_range_test (location_t loc, enum tr
   /* On machines where the branch cost is expensive, if this is a
      short-circuited branch and the underlying object on both sides
      is the same, make a non-short-circuit operation.  */
-  else if (LOGICAL_OP_NON_SHORT_CIRCUIT
-	   && !flag_sanitize_coverage
-	   && lhs != 0 && rhs != 0
-	   && (code == TRUTH_ANDIF_EXPR
-	       || code == TRUTH_ORIF_EXPR)
-	   && operand_equal_p (lhs, rhs, 0))
+  bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT;
+  if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1)
+    logical_op_non_short_circuit
+      = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT);
+  if (logical_op_non_short_circuit
+      && !flag_sanitize_coverage
+      && lhs != 0 && rhs != 0
+      && (code == TRUTH_ANDIF_EXPR || code == TRUTH_ORIF_EXPR)
+      && operand_equal_p (lhs, rhs, 0))
     {
       /* If simple enough, just rewrite.  Otherwise, make a SAVE_EXPR
 	 unless we are at top level or LHS contains a PLACEHOLDER_EXPR, in
@@ -8229,7 +8232,11 @@  fold_truth_andor (location_t loc, enum t
   if ((tem = fold_truth_andor_1 (loc, code, type, arg0, arg1)) != 0)
     return tem;
 
-  if (LOGICAL_OP_NON_SHORT_CIRCUIT
+  bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT;
+  if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1)
+    logical_op_non_short_circuit
+      = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT);
+  if (logical_op_non_short_circuit
       && !flag_sanitize_coverage
       && (code == TRUTH_AND_EXPR
           || code == TRUTH_ANDIF_EXPR
--- gcc/testsuite/lib/target-supports.exp.jj	2018-11-27 09:48:52.703199324 +0100
+++ gcc/testsuite/lib/target-supports.exp	2018-11-30 12:58:00.950526259 +0100
@@ -8486,29 +8486,6 @@  proc check_effective_target_tiny {} {
     }]
 }
 
-# Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
-
-proc check_effective_target_logical_op_short_circuit {} {
-    if { [istarget mips*-*-*]
-	 || [istarget arc*-*-*]
-	 || [istarget avr*-*-*]
-	 || [istarget crisv32-*-*] || [istarget cris-*-*]
-	 || [istarget csky*-*-*]
-	 || [istarget mmix-*-*]
-	 || [istarget msp430-*-*]
-	 || [istarget s390*-*-*]
-	 || [istarget powerpc*-*-*]
-	 || [istarget nios2*-*-*]
-	 || [istarget riscv*-*-*]
-	 || [istarget v850*-*-*]
-	 || [istarget visium-*-*]
-	 || [istarget or1k*-*-*]
-	 || [check_effective_target_arm_cortex_m] } {
-	return 1
-    }
-    return 0
-}
-
 # Return 1 if the target supports -mbranch-cost=N option.
 
 proc check_effective_target_branch_cost {} {
--- gcc/testsuite/gcc.dg/builtin-bswap-7.c.jj	2018-01-10 17:08:51.130912595 +0100
+++ gcc/testsuite/gcc.dg/builtin-bswap-7.c	2018-11-30 12:45:29.611885197 +0100
@@ -3,9 +3,9 @@ 
 /* { dg-require-effective-target lp64 } */
 /* { dg-options "-O -fdump-rtl-combine" } */
 
-/* The branch cost setting prevents the return value from being
+/* The param setting prevents the return value from being
    calculated with arithmetic instead of doing a compare.  */
-/* { dg-additional-options "-mbranch-cost=0" { target branch_cost } } */
+/* { dg-additional-options "--param logical-op-non-short-circuit=0" } */
 
 #include <stdint.h>
 
--- gcc/testsuite/gcc.dg/pr21643.c.jj	2018-01-17 12:03:37.742893111 +0100
+++ gcc/testsuite/gcc.dg/pr21643.c	2018-11-30 12:47:34.923825064 +0100
@@ -1,7 +1,6 @@ 
 /* PR tree-optimization/21643 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-options "-O2 -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
 
 int
 f1 (unsigned char c)
@@ -87,5 +86,4 @@  f9 (unsigned char c)
   return 1;
 }
 
-/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 6 "reassoc1" { target { ! logical_op_short_circuit } } } }  */
-/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 5 "reassoc1" { target logical_op_short_circuit } } } */
+/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 6 "reassoc1" } }  */
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c.jj	2018-01-10 17:08:54.446912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c	2018-11-30 12:55:11.133321904 +0100
@@ -1,7 +1,5 @@ 
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int t (int a, int b)
 {
--- gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c.jj	2018-11-27 09:56:06.785043756 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c	2018-11-30 12:49:53.889540472 +0100
@@ -1,6 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-options "-O1 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int f(int a, int b, int c)
 {
@@ -23,5 +22,4 @@  int h(int a, int b, int c, int d)
  return a;
 }
 
-/* { dg-final { scan-tree-dump-times "if" 0 "optimized" { target { { ! logical_op_short_circuit } || branch_cost } } } } */
-/* { dg-final { scan-tree-dump-times "if" 2 "optimized" { target { logical_op_short_circuit && { ! branch_cost } } } } } */
+/* { dg-final { scan-tree-dump-times "if" 0 "optimized" } } */
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c.jj	2018-11-30 13:06:28.810165576 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c	2018-11-30 13:07:16.721376833 +0100
@@ -0,0 +1,24 @@ 
+/* { dg-do compile } */ 
+/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89 --param logical-op-non-short-circuit=0" } */
+
+#include "ssa-dom-thread-4.c"
+
+/* On targets that define LOGICAL_OP_NON_SHORT_CIRCUIT to 0, we split both
+   "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
+   rather than using "(var1 != 0) op (var2 != 0)".  Also, as on other targets,
+   we duplicate the header of the inner "while" loop.  There are then
+   4 threading opportunities:
+
+   1x "!a_elt && b_elt" in the outer "while" loop
+      -> the start of the inner "while" loop,
+	 skipping the known-true "b_elt" in the first condition.
+   1x "!b_elt" in the first condition
+      -> the outer "while" loop's continuation point,
+	 skipping the known-false "b_elt" in the second condition.
+   2x "kill_elt->indx >= b_elt->indx" in the first "while" loop
+      -> "kill_elt->indx == b_elt->indx" in the second condition,
+	 skipping the known-true "b_elt && kill_elt" in the second
+	 condition.
+
+   All the cases are picked up by VRP1 as jump threads.  */
+/* { dg-final { scan-tree-dump-times "Threaded" 4 "vrp1" } } */
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c.jj	2018-01-10 17:08:54.420912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c	2018-11-30 12:54:58.227534360 +0100
@@ -1,7 +1,5 @@ 
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int t (int a, int b)
 {
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c.jj	2017-05-22 10:49:47.042056778 +0200
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c	2018-11-30 12:54:02.680448814 +0100
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */ 
-/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89" } */
+/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89 --param logical-op-non-short-circuit=1" } */
 struct bitmap_head_def;
 typedef struct bitmap_head_def *bitmap;
 typedef const struct bitmap_head_def *const_bitmap;
@@ -58,25 +58,4 @@  bitmap_ior_and_compl (bitmap dst, const_
    code we missed the edge when the first conditional is false
    (b_elt is zero, which means the second conditional is always
    zero.  VRP1 catches all three.  */
-/* { dg-final { scan-tree-dump-times "Threaded" 3 "vrp1" { target { ! logical_op_short_circuit } } } } */
-
-/* On targets that define LOGICAL_OP_NON_SHORT_CIRCUIT to 0, we split both
-   "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
-   rather than using "(var1 != 0) op (var2 != 0)".  Also, as on other targets,
-   we duplicate the header of the inner "while" loop.  There are then
-   4 threading opportunities:
-
-   1x "!a_elt && b_elt" in the outer "while" loop
-      -> the start of the inner "while" loop,
-	 skipping the known-true "b_elt" in the first condition.
-   1x "!b_elt" in the first condition
-      -> the outer "while" loop's continuation point,
-	 skipping the known-false "b_elt" in the second condition.
-   2x "kill_elt->indx >= b_elt->indx" in the first "while" loop
-      -> "kill_elt->indx == b_elt->indx" in the second condition,
-	 skipping the known-true "b_elt && kill_elt" in the second
-	 condition.
-
-   All the cases are picked up by VRP1 as jump threads.  */
-/* { dg-final { scan-tree-dump-times "Threaded" 4 "vrp1" { target logical_op_short_circuit } } } */
-
+/* { dg-final { scan-tree-dump-times "Threaded" 3 "vrp1" } } */
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c.jj	2018-01-10 17:08:54.445912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c	2018-11-30 12:55:21.929144176 +0100
@@ -1,7 +1,5 @@ 
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int t (int a, int b)
 {
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c.jj	2017-03-21 07:56:58.547197052 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c	2018-11-30 12:56:38.369885758 +0100
@@ -1,6 +1,5 @@ 
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* riscv*-*-* } } } } }  */
-/* { dg-additional-options "-O2 -fdump-tree-vrp-details" }  */
-/* { dg-additional-options "-mbranch-cost=2" { target i?86-*-* x86_64-*-* } }  */
+/* { dg-do compile } */
+/* { dg-additional-options "-O2 -fdump-tree-vrp-details --param logical-op-non-short-circuit=1" }  */
 /* { dg-final { scan-tree-dump-times "Threaded jump" 8 "vrp1" } }  */
 
 void foo (void);
--- gcc/testsuite/gcc.dg/tree-ssa/vrp47.c.jj	2016-11-18 20:04:25.387592572 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/vrp47.c	2018-11-30 12:57:21.140181652 +0100
@@ -1,10 +1,7 @@ 
 /* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 inhibits the setcc
    optimizations that expose the VRP opportunity.  */
-/* Skip on S/390.  Lower values in BRANCH_COST lead to two conditional
-   jumps when evaluating an && condition.  VRP is not able to optimize
-   this.  */
-/* { dg-do compile { target { ! { logical_op_short_circuit || { s390*-*-* mn10300-*-* hppa*-*-* m68k*-*-* } } } } } */
-/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom2 -fdump-tree-vrp2" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom2 -fdump-tree-vrp2 --param logical-op-non-short-circuit=1" } */
 /* { dg-additional-options "-march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 int h(int x, int y)
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c.jj	2017-09-01 09:26:16.708987277 +0200
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c	2018-11-30 12:52:31.598947733 +0100
@@ -1,5 +1,5 @@ 
-/* { dg-do compile { target { ! logical_op_short_circuit  } } } */
-/* { dg-options "-O2 -fdump-tree-dom2-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-dom2-details --param logical-op-non-short-circuit=1" } */
 
 static int *bb_ticks;
 extern void frob (void);
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c.jj	2017-09-01 09:26:16.706987300 +0200
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c	2018-11-30 12:52:56.338540969 +0100
@@ -1,5 +1,5 @@ 
-/* { dg-do compile { target { ! logical_op_short_circuit  } } } */
-/* { dg-options "-O2 -fdump-tree-dom2-details -w" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-dom2-details -w --param logical-op-non-short-circuit=1" } */
 unsigned char
 validate_subreg (unsigned int offset, unsigned int isize, unsigned int osize, int zz, int qq)
 {
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c.jj	2017-09-01 09:26:16.705987312 +0200
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c	2018-11-30 12:52:44.784730957 +0100
@@ -1,5 +1,5 @@ 
-/* { dg-do compile { target { ! logical_op_short_circuit  } } } */
-/* { dg-options "-O2 -fdump-tree-dom2-details -w" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-dom2-details -w --param logical-op-non-short-circuit=1" } */
 
 enum optab_methods
 {
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c.jj	2018-01-10 17:08:54.445912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c	2018-11-30 12:55:41.892815519 +0100
@@ -1,7 +1,5 @@ 
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int t (int a, int b, int c)
 {
--- gcc/testsuite/gcc.dg/tree-ssa/vrp87.c.jj	2016-06-24 12:59:14.107521797 +0200
+++ gcc/testsuite/gcc.dg/tree-ssa/vrp87.c	2018-11-30 12:57:34.758957443 +0100
@@ -1,8 +1,7 @@ 
 /* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 leads to two conditional jumps
    when evaluating an && condition.  */
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* } } } } } */
-
-/* { dg-options "-O2 -fdump-tree-fre1-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-fre1-details --param logical-op-non-short-circuit=1" } */
 
 struct bitmap_head_def;
 typedef struct bitmap_head_def *bitmap;
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c.jj	2018-01-10 17:08:54.454912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c	2018-11-30 12:55:56.581573705 +0100
@@ -1,7 +1,5 @@ 
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int t (int a, int b, int c)
 {
--- gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c.jj	2018-01-10 17:08:54.455912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c	2018-11-30 12:50:47.734655261 +0100
@@ -1,6 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=1" { target branch_cost } } */
+/* { dg-options "-O1 -fdump-tree-optimized --param logical-op-non-short-circuit=0" } */
 
 _Bool f1(_Bool a, _Bool b)
 {
@@ -21,4 +20,4 @@  _Bool f1(_Bool a, _Bool b)
    which can be fixed in a different patch).
    Test this only when known to be !LOGICAL_OP_NON_SHORT_CIRCUIT,
    otherwise ifcombine may convert this into return a & b;.  */
-/* { dg-final { scan-tree-dump-times "if" 1 "optimized" { target { i?86-*-* x86_64-*-* mips*-*-* s390*-*-* avr*-*-* } } } } */
+/* { dg-final { scan-tree-dump-times "if" 1 "optimized" } } */
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c.jj	2018-01-10 17:08:54.454912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c	2018-11-30 12:54:42.218797903 +0100
@@ -1,6 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -fdump-tree-optimized-details-blocks" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-options "-O1 -fdump-tree-optimized-details-blocks --param logical-op-non-short-circuit=1" } */
 
 _Bool f1(_Bool a, _Bool b)
 {
@@ -17,5 +16,5 @@  _Bool f1(_Bool a, _Bool b)
 
 /* For LOGICAL_OP_NON_SHORT_CIRCUIT, this should be optimized
    into return a & b;, with no ifs.  */
-/* { dg-final { scan-tree-dump-not "if" "optimized" { target { i?86-*-* x86_64-*-* s390*-*-* avr*-*-* } } } } */
+/* { dg-final { scan-tree-dump-not "if" "optimized" } } */
 /* { dg-final { scan-tree-dump-not "Invalid sum" "optimized" } } */
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c.jj	2016-06-24 12:59:14.101521870 +0200
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c	2018-11-30 12:56:20.844174279 +0100
@@ -1,5 +1,5 @@ 
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* bfin*-*-* v850*-*-* moxie*-*-* m32c*-*-* fr30*-*-* mcore*-*-* frv-*-* h8300-*-* m32r-*-* mn10300-*-* msp430-*-* pdp11-*-* rl78-*-* rx-*-* vax-*-*} } } } } */
-/* { dg-options "-O2 -fdump-tree-vrp2-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp2-details --param logical-op-non-short-circuit=1" } */
 /* { dg-final { scan-tree-dump-not "IRREDUCIBLE_LOOP" "vrp2" } } */
 
 void abort (void);
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c.jj	2018-01-10 17:08:54.450912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c	2018-11-30 12:55:32.046977611 +0100
@@ -1,7 +1,5 @@ 
-/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
-
-/* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int t (int a, int b)
 {
--- gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c.jj	2016-11-25 09:49:42.948451258 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c	2018-11-30 12:49:31.729904778 +0100
@@ -1,7 +1,7 @@ 
 /* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 leads to two conditional jumps
    when evaluating an && condition.  VRP is not able to optimize this.  */
-/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* } } } } } */
-/* { dg-options "-O2 -fdump-tree-forwprop1-details" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-forwprop1-details --param logical-op-non-short-circuit=1" } */
 
 extern char *frob (void);
 extern _Bool testit (void);
--- gcc/testsuite/gcc.dg/binop-xor1.c.jj	2015-05-29 15:03:24.081869204 +0200
+++ gcc/testsuite/gcc.dg/binop-xor1.c	2018-11-30 12:42:00.074329992 +0100
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* { dg-options "-O2 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */
 
 int
 foo (int a, int b, int c)
@@ -7,4 +7,4 @@  foo (int a, int b, int c)
   return ((a && !b && c) || (!a && b && c));
 }
 
-/* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" { xfail logical_op_short_circuit } } } */
+/* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" } } */
--- gcc/testsuite/gcc.dg/pr46309.c.jj	2018-01-10 17:08:51.536912606 +0100
+++ gcc/testsuite/gcc.dg/pr46309.c	2018-11-30 12:48:29.032935507 +0100
@@ -1,10 +1,6 @@ 
 /* PR tree-optimization/46309 */
-/* { dg-do compile { target { { ! logical_op_short_circuit } || { mips*-*-* avr*-*-* } } } } */
-/* { dg-options "-O2 -fdump-tree-reassoc-details" } */
-/* The transformation depends on BRANCH_COST being greater than 1
-   (see the notes in the PR), so try to force that.  */
-/* { dg-additional-options "-mtune=octeon2" { target mips*-*-* } } */
-/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-reassoc-details --param logical-op-non-short-circuit=1" } */
 
 int
 f1 (int a)
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c.jj	2018-01-10 17:08:54.441912688 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c	2018-11-30 18:01:08.453103273 +0100
@@ -1,6 +1,6 @@ 
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
 
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
 /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c.jj	2018-11-09 14:01:58.296296195 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c	2018-11-30 18:01:14.569002898 +0100
@@ -1,6 +1,6 @@ 
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k-*-*-*"} } } */
 
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
 /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c.jj	2018-11-09 14:01:58.295296211 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c	2018-11-30 18:01:23.533855782 +0100
@@ -1,6 +1,6 @@ 
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
 
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
 /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c.jj	2018-11-09 14:01:58.296296195 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c	2018-11-30 18:01:29.589756401 +0100
@@ -1,6 +1,6 @@ 
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
 
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
 /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (unsigned int a, int b, int c)
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c.jj	2018-11-09 14:01:58.296296195 +0100
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c	2018-11-30 18:01:34.914669014 +0100
@@ -1,6 +1,6 @@ 
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */
 
-/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
+/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
 /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)