Show patches with: State = Action Required       |   127105 patches
« 1 2 ... 13 14 15 … 1271 1272 »
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
Fix ICE of unrecognizable insn. Fix ICE of unrecognizable insn. - - - - --- 2023-11-16 liuhongt New
[V2] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VC… [V2] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VC… - - - - --- 2023-11-16 liuhongt New
[1/2] Support reduc_{plus, xor, and, ior}_scal_m for vector integer mode. [1/2] Support reduc_{plus, xor, and, ior}_scal_m for vector integer mode. - - - - --- 2023-11-17 liuhongt New
[2/2] Add i?86-*-* and x86_64-*-* to vect_logical_reduc [1/2] Support reduc_{plus, xor, and, ior}_scal_m for vector integer mode. - - - - --- 2023-11-17 liuhongt New
Support cbranchm for Vector HI/QImode. Support cbranchm for Vector HI/QImode. - - - - --- 2023-11-17 liuhongt New
[x86] Support reduc_{and, ior, xor}_scal_m for V4HI/V8QI/V4QImode [x86] Support reduc_{and, ior, xor}_scal_m for V4HI/V8QI/V4QImode - - - - --- 2023-11-20 liuhongt New
Set AVOID_256FMA_CHAINS TO m_GENERIC as it's generally good to new platforms Set AVOID_256FMA_CHAINS TO m_GENERIC as it's generally good to new platforms - - - - --- 2023-11-22 liuhongt New
Take register pressure into account for vec_construct when the components are not loaded from memor… Take register pressure into account for vec_construct when the components are not loaded from memor… - - - - --- 2023-11-28 liuhongt New
[x86] Support sdot_prodv*qi with emulation of sdot_prodv*hi. [x86] Support sdot_prodv*qi with emulation of sdot_prodv*hi. - - - - --- 2023-11-29 liuhongt New
Use vec_extact_lo instead of subreg in reduc_<code>_scal_m. Use vec_extact_lo instead of subreg in reduc_<code>_scal_m. - - - - --- 2023-11-29 liuhongt New
Take register pressure into account for vec_construct/scalar_to_vec when the components are not loa… Take register pressure into account for vec_construct/scalar_to_vec when the components are not loa… - - - - --- 2023-12-01 liuhongt New
Don't vectorize when vector stmts are only vec_contruct and stores Don't vectorize when vector stmts are only vec_contruct and stores - - - - --- 2023-12-04 liuhongt New
Support udot_prodv*qi with emulation sdot_prodv*hi Support udot_prodv*qi with emulation sdot_prodv*hi - - - - --- 2023-12-04 liuhongt New
Don't assume it's AVX_U128_CLEAN after call_insn whose abi.mode_clobber(V4DImode) deosn't contains … Don't assume it's AVX_U128_CLEAN after call_insn whose abi.mode_clobber(V4DImode) deosn't contains … - - - - --- 2023-12-08 liuhongt New
[ICE] Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP. [ICE] Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP. - - - - --- 2023-12-08 liuhongt New
[v3] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VC… [v3] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VC… - - - - --- 2023-12-11 liuhongt New
Adjust vectorized cost for reduction. Adjust vectorized cost for reduction. - - - - --- 2023-12-12 liuhongt New
Force broadcast constant to mem for vec_dup{v4di, v8si, v4df, v8df} when TARGET_AVX2 is not availab… Force broadcast constant to mem for vec_dup{v4di, v8si, v4df, v8df} when TARGET_AVX2 is not availab… - - - - --- 2023-12-13 liuhongt New
Optimize A < B ? A : B to MIN_EXPR. Optimize A < B ? A : B to MIN_EXPR. - - - - --- 2023-12-19 liuhongt New
Optimize A < B ? A : B to MIN_EXPR. Optimize A < B ? A : B to MIN_EXPR. - - - - --- 2024-01-09 liuhongt New
Update documents for fcf-protection= Update documents for fcf-protection= - - - - --- 2024-01-10 liuhongt New
Document refactoring of the option -fcf-protection=x. Document refactoring of the option -fcf-protection=x. - - - - --- 2024-01-10 liuhongt New
Fix testcase failure on many platforms which don't support vect_int_max. Fix testcase failure on many platforms which don't support vect_int_max. - - - - --- 2024-01-19 liuhongt New
Adjust testcase gcc.target/i386/part-vect-copysignhf.c. Adjust testcase gcc.target/i386/part-vect-copysignhf.c. - - - - --- 2024-01-19 liuhongt New
[1/2] Adjust hwasan testcase for x86 target. [1/2] Adjust hwasan testcase for x86 target. - - - - --- 2024-01-23 liuhongt New
[2/2,x86] Enable -mlam=u57 by default when compiled with -fsanitize=hwaddress. [1/2] Adjust hwasan testcase for x86 target. - - - - --- 2024-01-23 liuhongt New
[wwwdoc] Hardware-assisted AddressSanitizer now works for x86_64 with LAM_U57 [wwwdoc] Hardware-assisted AddressSanitizer now works for x86_64 with LAM_U57 - - - - --- 2024-02-08 liuhongt New
Fix testcase for platform without gnu/stubs-x32.h Fix testcase for platform without gnu/stubs-x32.h - - - - --- 2024-02-19 liuhongt New
sanitizer: [PR110027] Align asan_vec[0] to MAX (alignb, ASAN_RED_ZONE_SIZE) sanitizer: [PR110027] Align asan_vec[0] to MAX (alignb, ASAN_RED_ZONE_SIZE) - - - - --- 2024-03-12 liuhongt New
i386[stv]: Handle REG_EH_REGION note i386[stv]: Handle REG_EH_REGION note - - - - --- 2024-03-14 liuhongt New
Add missing <any_logic>hf/bf patterns. Add missing <any_logic>hf/bf patterns. - - - - --- 2024-03-18 liuhongt New
i386 [stv]: Handle REG_EH_REGION note [pr111822]. i386 [stv]: Handle REG_EH_REGION note [pr111822]. - - - - --- 2024-03-18 liuhongt New
Document -fexcess-precision=16. Document -fexcess-precision=16. - - - - --- 2024-03-18 liuhongt New
[V2] Document -fexcess-precision=16. [V2] Document -fexcess-precision=16. - - - - --- 2024-03-20 liuhongt New
Fix runtime error for nonlinear iv vectorization(step_mult). Fix runtime error for nonlinear iv vectorization(step_mult). - - - - --- 2024-03-21 liuhongt New
Move pr114396.c from gcc.target/i386 to gcc.c-torture/execute. Move pr114396.c from gcc.target/i386 to gcc.c-torture/execute. - - - - --- 2024-03-22 liuhongt New
[V2] sanitizer: [PR110027] Align asan_vec[0] to MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, ASAN_RED_ZO… [V2] sanitizer: [PR110027] Align asan_vec[0] to MAX (BIGGEST_ALIGNMENT / BITS_PER_UNIT, ASAN_RED_ZO… - - - - --- 2024-03-26 liuhongt New
[x86] Adjust alternative *k to ?k for avx512 mask in zero_extend patterns [x86] Adjust alternative *k to ?k for avx512 mask in zero_extend patterns - - - - --- 2024-04-28 liuhongt New
Update libbid according to the latest Intel Decimal Floating-Point Math Library. Update libbid according to the latest Intel Decimal Floating-Point Math Library. - - - - --- 2024-04-28 liuhongt New
[1/2,x86] Support dot_prod optabs for 64-bit vector. [1/2,x86] Support dot_prod optabs for 64-bit vector. - - - - --- 2024-04-28 liuhongt New
[2/2] Extend usdot_prodv*qi with vpmaddwd when AVXVNNI/AVX512VNNI is not available. [1/2,x86] Support dot_prod optabs for 64-bit vector. - - - - --- 2024-04-28 liuhongt New
[x86] Optimize 64-bit vector permutation with punpcklqdq + 128-bit vector pshuf. [x86] Optimize 64-bit vector permutation with punpcklqdq + 128-bit vector pshuf. - - - - --- 2024-04-28 liuhongt New
Don't assert for IFN_COND_{MIN, MAX} in vect_transform_reduction Don't assert for IFN_COND_{MIN, MAX} in vect_transform_reduction - - - - --- 2024-04-29 liuhongt New
mips: Add appropriate linker flags when compiling with -static-pie mips: Add appropriate linker flags when compiling with -static-pie - - - - --- 2022-09-14 linted New
libstdc++: std::iterator is deprecated since C++17 libstdc++: std::iterator is deprecated since C++17 - - - - --- 2020-10-08 korel ka New
[v2,1/1] libstdc++: Set _M_string_length before calling _M_dispose() [PR109703] Set _M_string_length before calling _M_dispose() - - - - --- 2023-05-03 kefu chai New
[PR81810] unused strcpy to a local buffer not eliminated [PR81810] unused strcpy to a local buffer not eliminated - - - - --- 2019-08-21 kamlesh kumar New
[PR91504] Inlining misses some logical operation folding [PR91504] Inlining misses some logical operation folding - - - - --- 2019-08-26 kamlesh kumar New
[PR89924,missed-optimization] Function not de-virtualized within the same TU [PR89924,missed-optimization] Function not de-virtualized within the same TU - - - - --- 2019-09-26 kamlesh kumar New
[PR83534] C++17: typeinfo for noexcept function lacks noexcept information [PR83534] C++17: typeinfo for noexcept function lacks noexcept information - - - - --- 2019-10-04 kamlesh kumar New
[PR91979] Incorrect mangling for non-template-argument nullptr expression [PR91979] Incorrect mangling for non-template-argument nullptr expression - - - - --- 2019-10-22 kamlesh kumar New
[[PATCH,PR91979] handle mangling of nullptr expression ] updated the fix [[PATCH,PR91979] handle mangling of nullptr expression ] updated the fix - - - - --- 2019-10-23 kamlesh kumar New
[v2,PR91979] Updated the fix: [v2,PR91979] Updated the fix: - - - - --- 2019-11-02 kamlesh kumar New
[v3] Updated the Fix: [v3] Updated the Fix: - - - - --- 2019-11-03 kamlesh kumar New
[libstd++,PR92156] [libstd++,PR92156] - - - - --- 2020-04-17 kamlesh kumar New
[v1,1/2,PPC64,PR88877] [v1,1/2,PPC64,PR88877] - - - - --- 2020-05-24 kamlesh kumar New
Defined libcall_arg_t Defined libcall_arg_t - - - - --- 2020-06-13 kamlesh kumar New
Defined libcall_arg_t Defined libcall_arg_t - - - - --- 2020-06-13 kamlesh kumar New
PATCH [DR2303][PR97453] PATCH [DR2303][PR97453] - - - - --- 2020-10-21 kamlesh kumar New
[01/21] Add RVV modes and support scalable vector *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[02/21] Add RVV intrinsic framework *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[03/21] Add RVV datatypes *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[04/21] Add RVV intrinsic enable #pragma riscv intrinsic "vector" and introduce RVV header "riscv_v… *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[05/21] Add RVV configuration intrinsic *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[06/21] Add insert-vsetvl pass *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[07/21] Add register spilling support *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[08/21] Add poly manipulation *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[09/21] Add misc function intrinsic support *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[11/21] Add calling function support *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[12/21] Add set get intrinsic support *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[13/21] Adjust scalable frame and full testcases *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[15/21] Add integer intrinsics *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[18/21] Add rest intrinsic support *** Add RVV (RISC-V 'V' Extension) support *** - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[v2,1/1] Add unit-stride load store intrinsics RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-05-31 juzhe.zhong@rivai.ai New
[v3] RISC-V: Add load and store intrinsics support for RVV support [v3] RISC-V: Add load and store intrinsics support for RVV support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,02/34] RISC-V: Add vlex_2.c RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,03/34] RISC-V: Add vlex_1.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,04/34] RISC-V: Add mask load store testcases RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,06/34] RISC-V: Add vlexff_2.c RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,12/34] RISC-V: Add vlsex_2.c RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,17/34] RISC-V: Add vsex.c RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,19/34] RISC-V: Add vssex.c RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,21/34] RISC-V: Add vlexff_1.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,22/34] RISC-V: Add vloxeix_1.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,23/34] RISC-V: Add vloxeix_2.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,24/34] RISC-V: Add vloxeix_3.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,25/34] RISC-V: Add vloxeix_4.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,26/34] RISC-V: Add vlsex_1.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,27/34] RISC-V: Add vluxeix_1.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,28/34] RISC-V: Add vluxeix_2.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,29/34] RISC-V: Add vluxeix_3.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,30/34] RISC-V: Add vluxeix_4.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,31/34] RISC-V: Add vsex.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,32/34] RISC-V: Add vsoxeix.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,33/34] RISC-V: Add vssex.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[v4,34/34] RISC-V: Add vsuxeix.C RISC-V: Add RVV (RISC-V 'V' Extension) support - - - - --- 2022-06-01 juzhe.zhong@rivai.ai New
[1/1] Fix bit-position comparison middle-end: Fix bit position comparison - - - - --- 2022-07-27 juzhe.zhong@rivai.ai New
RISC-V: Add runtime invariant support RISC-V: Add runtime invariant support - - - - --- 2022-08-17 juzhe.zhong@rivai.ai New
middle-end: skipp stepped vector test of poly_int (1, 1) and allow the machine_mode definition with… middle-end: skipp stepped vector test of poly_int (1, 1) and allow the machine_mode definition with… - - - - --- 2022-08-18 juzhe.zhong@rivai.ai New
middle-end: Fix issue of poly_uint16 (1, 1) in self test middle-end: Fix issue of poly_uint16 (1, 1) in self test - - - - --- 2022-08-22 juzhe.zhong@rivai.ai New
« 1 2 ... 13 14 15 … 1271 1272 »