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Support cbranchm for Vector HI/QImode.

Message ID 20231117051058.535141-1-hongtao.liu@intel.com
State New
Headers show
Series Support cbranchm for Vector HI/QImode. | expand

Commit Message

Liu, Hongtao Nov. 17, 2023, 5:10 a.m. UTC 
The missing cbranchv*{hi,qi}4 maybe needed by early break vectorization.

Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ready push to trunk.

gcc/ChangeLog:

	* config/i386/sse.md (cbranch<mode>4): Extend to Vector
	HI/QImode.
---
 gcc/config/i386/sse.md | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)
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Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index d250a6cb802..3659660a616 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -514,6 +514,12 @@  (define_mode_iterator VI_AVX2
    (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8SI "TARGET_AVX2") V4SI
    (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX2") V2DI])
 
+(define_mode_iterator VI_AVX_AVX512F
+  [(V64QI "TARGET_AVX512F && TARGET_EVEX512") (V32QI "TARGET_AVX") V16QI
+   (V32HI "TARGET_AVX512F && TARGET_EVEX512") (V16HI "TARGET_AVX") V8HI
+   (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8SI "TARGET_AVX") V4SI
+   (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX") V2DI])
+
 ;; All QImode vector integer modes
 (define_mode_iterator VI1
   [(V32QI "TARGET_AVX") V16QI])
@@ -27868,8 +27874,8 @@  (define_insn "<avx512>_store<mode>_mask"
 
 (define_expand "cbranch<mode>4"
   [(set (reg:CC FLAGS_REG)
-	(compare:CC (match_operand:VI48_AVX_AVX512F 1 "register_operand")
-		    (match_operand:VI48_AVX_AVX512F 2 "nonimmediate_operand")))
+	(compare:CC (match_operand:VI_AVX_AVX512F 1 "register_operand")
+		    (match_operand:VI_AVX_AVX512F 2 "nonimmediate_operand")))
    (set (pc) (if_then_else
 	       (match_operator 0 "bt_comparison_operator"
 		[(reg:CC FLAGS_REG) (const_int 0)])