| Message ID | 20201015114725.23137-2-daire.mcnamara@microchip.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | CLK: microchip: Add clkcfg driver for Microchip PolarFire SoC | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 0 errors, 2 warnings, 70 lines checked |
| robh/dt-meta-schema | fail | build log |
On Thu, 15 Oct 2020 at 14:25, <daire.mcnamara@microchip.com> wrote: > > From: Daire McNamara <daire.mcnamara@microchip.com> > > Add device tree bindings for the Microchip PolarFire system > clock controller > > Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Hi, You have here a weird indentation. Commit msg should not be indented. Subject: the subsystem prefix is "clk", not CLK. This applies to all patches. > --- > .../bindings/clock/microchip,pfsoc.yaml | 70 +++++++++++++++++++ > 1 file changed, 70 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml > > diff --git a/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml > new file mode 100644 > index 000000000000..c833e7b6a7cd > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml > @@ -0,0 +1,70 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/microchip,pfsoc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Microchip PolarFire Clock Control Module Binding > + > +maintainers: > + - Daire McNamara <daire.mcnamara@microchip.com> > + > +description: | > + Microchip PolarFire clock control is an integrated clock controller, which > + generates clocks and supplies to all peripherals. > + > +properties: > + compatible: > + const: microchip,pfsoc-clkcfg > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: reference clock input > + > + clock-names: > + items: > + - const: ref_clk I am not sure if it makes sense to add "clk" suffix to the clock names. It seems it appears in existing bindings but it is actually a duplication of information. How about just "ref"? > + > + '#clock-cells': > + const: 1 > + description: | > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,pfsoc-clock.h > + for the full list of PolarFire clock IDs. > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - '#clock-cells' additionalProperties: false ... and most likely you miss some properties (judging by example). > + > +examples: > + # Clock Config node: > + - | > + soc { I think you can skip the soc in example - it does not help. > + #address-cells = <2>; > + #size-cells = <2>; > + clkcfg: clock-controller@20002000 { > + compatible = "microchip,pfsoc-clkcfg"; > + reg = <0x0 0x20002000 0x0 0x1000>; > + reg-names = "mss_sysreg"; > + clocks = <&ref_clk 0>; > + clock-names = "ref_clk"; > + #clock-cells = <1>; > + clock-output-names = "cpu", "axi", "ahb", "envm", "mac0", "mac1", "mmc", "timer", "mmuart0", "mmuart1", "mmuart2", "mmuart3", "mmuart4", "spi0", "spi1", "i2c0", "i2c1", "can0", "can1", "usb", "rtc", "qspi", "gpio0", "gpio1", "gpio2", "ddrc", "fic0", "fic1", "fic2", "fic3", "athena", "cfm"; > + }; > + }; > + > + # Required external clocks for Clock Control Module node: > + - | > + refclk: refclk { Skip it, not relevant and not even correct phandle for example #1. Best regards, Krzysztof
On Thu, 15 Oct 2020 12:47:24 +0100, daire.mcnamara@microchip.com wrote: > From: Daire McNamara <daire.mcnamara@microchip.com> > > Add device tree bindings for the Microchip PolarFire system > clock controller > > Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> > --- > .../bindings/clock/microchip,pfsoc.yaml | 70 +++++++++++++++++++ > 1 file changed, 70 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml > My bot found errors running 'make dt_binding_check' on your patch: ./Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml:58:111: [warning] line too long (306 > 110 characters) (line-length) See https://patchwork.ozlabs.org/patch/1382572 If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date: pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml new file mode 100644 index 000000000000..c833e7b6a7cd --- /dev/null +++ b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/microchip,pfsoc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PolarFire Clock Control Module Binding + +maintainers: + - Daire McNamara <daire.mcnamara@microchip.com> + +description: | + Microchip PolarFire clock control is an integrated clock controller, which + generates clocks and supplies to all peripherals. + +properties: + compatible: + const: microchip,pfsoc-clkcfg + + reg: + maxItems: 1 + + clocks: + items: + - description: reference clock input + + clock-names: + items: + - const: ref_clk + + '#clock-cells': + const: 1 + description: | + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,pfsoc-clock.h + for the full list of PolarFire clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +examples: + # Clock Config node: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + clkcfg: clock-controller@20002000 { + compatible = "microchip,pfsoc-clkcfg"; + reg = <0x0 0x20002000 0x0 0x1000>; + reg-names = "mss_sysreg"; + clocks = <&ref_clk 0>; + clock-names = "ref_clk"; + #clock-cells = <1>; + clock-output-names = "cpu", "axi", "ahb", "envm", "mac0", "mac1", "mmc", "timer", "mmuart0", "mmuart1", "mmuart2", "mmuart3", "mmuart4", "spi0", "spi1", "i2c0", "i2c1", "can0", "can1", "usb", "rtc", "qspi", "gpio0", "gpio1", "gpio2", "ddrc", "fic0", "fic1", "fic2", "fic3", "athena", "cfm"; + }; + }; + + # Required external clocks for Clock Control Module node: + - | + refclk: refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <600000000>; + clock-output-names = "msspllclk"; + }; +...