| Message ID | 70c25829-8c88-41ca-e70a-1f2dd4edf342@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [AARCH64,1/6] Enable ARMv8.5-A in gcc | expand |
On Fri, Nov 02, 2018 at 01:38:25PM -0500, Sudakshina Das wrote: > Hi > > This patch is part of a series that enables ARMv8.5-A in GCC and > adds Branch Target Identification Mechanism. > (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) > > NOTE: This patch is dependent on Sam Tebbs patch to deprecate > -msign-return-address and add new -mbranch-protection option > https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00104.html > > This pass updates the CLI of -mbranch-protection to add "bti" as a new > type of branch protection and also add it its definition of "none" and > "standard". Since the BTI instructions, just like the return address > signing instructions are in the HINT space, this option is not limited > to ARMv8.5-A architecture version. > > The option does not really do anything functional. > The functional changes are in the next patch. I am initializing the > target variable aarch64_enable_bti to 2 since I am also adding a > configure option in a later patch and a value different from 0 and 1 > would help identify if its already been updated. > > Bootstrapped and regression tested with aarch64-none-linux-gnu. > Is this ok for trunk? OK. Thanks, James > *** gcc/ChangeLog *** > > 2018-xx-xx Sudakshina Das <sudi.das@arm.com> > > * config/aarch64/aarch64-protos.h (aarch64_bti_enabled): > Declare. > * config/aarch64/aarch64.c > (aarch64_handle_no_branch_protection): Disable bti for > -mbranch-protection=none. > (aarch64_handle_standard_branch_protection): Enable bti for > -mbranch-protection=standard. > (aarch64_handle_bti_protection): Enable bti for "bti" in the > string to -mbranch-protection. > (aarch64_bti_enabled): Check if bti is enabled. > * config/aarch64/aarch64.opt: Declare target variable. > * doc/invoke.texi: Add bti to the -mbranch-protection > documentation.
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index bba8204fa53083da49d00a8c2b29e62849bd233c..a5ccfe534b6c59c90bd91215f89c59d67fd88688 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -525,6 +525,7 @@ void aarch64_register_pragmas (void); void aarch64_relayout_simd_types (void); void aarch64_reset_previous_fndecl (void); bool aarch64_return_address_signing_enabled (void); +bool aarch64_bti_enabled (void); void aarch64_save_restore_target_globals (tree); void aarch64_addti_scratch_regs (rtx, rtx, rtx *, rtx *, rtx *, diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 039aec828d7dae60918493abb0d044001ac0b366..836275ab58de894529a72be88ff226da503598dc 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -1140,6 +1140,7 @@ static enum aarch64_parse_opt_result aarch64_handle_no_branch_protection (char* str ATTRIBUTE_UNUSED, char* rest) { aarch64_ra_sign_scope = AARCH64_FUNCTION_NONE; + aarch64_enable_bti = 0; if (rest) { error ("unexpected %<%s%> after %<%s%>", rest, str); @@ -1154,6 +1155,7 @@ aarch64_handle_standard_branch_protection (char* str ATTRIBUTE_UNUSED, { aarch64_ra_sign_scope = AARCH64_FUNCTION_NON_LEAF; aarch64_ra_sign_key = AARCH64_KEY_A; + aarch64_enable_bti = 1; if (rest) { error ("unexpected %<%s%> after %<%s%>", rest, str); @@ -1187,6 +1189,14 @@ aarch64_handle_pac_ret_b_key (char* str ATTRIBUTE_UNUSED, return AARCH64_PARSE_OK; } +static enum aarch64_parse_opt_result +aarch64_handle_bti_protection (char* str ATTRIBUTE_UNUSED, + char* rest ATTRIBUTE_UNUSED) +{ + aarch64_enable_bti = 1; + return AARCH64_PARSE_OK; +} + static const struct aarch64_branch_protec_type aarch64_pac_ret_subtypes[] = { { "leaf", aarch64_handle_pac_ret_leaf, NULL, 0 }, { "b-key", aarch64_handle_pac_ret_b_key, NULL, 0 }, @@ -1198,6 +1208,7 @@ static const struct aarch64_branch_protec_type aarch64_branch_protec_types[] = { { "standard", aarch64_handle_standard_branch_protection, NULL, 0 }, { "pac-ret", aarch64_handle_pac_ret_protection, aarch64_pac_ret_subtypes, sizeof (aarch64_pac_ret_subtypes) / sizeof (aarch64_branch_protec_type) }, + { "bti", aarch64_handle_bti_protection, NULL, 0 }, { NULL, NULL, NULL, 0 } }; @@ -4581,6 +4592,13 @@ aarch64_return_address_signing_enabled (void) && cfun->machine->frame.reg_offset[LR_REGNUM] >= 0)); } +/* Return TRUE if Branch Target Identification Mechanism is enabled. */ +bool +aarch64_bti_enabled (void) +{ + return (aarch64_enable_bti == 1); +} + /* Emit code to save the callee-saved registers from register number START to LIMIT to the stack at the location starting at offset START_OFFSET, skipping any write-back candidates if SKIP_WB is true. */ diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index 9460636d93b67af1525f028176aa78e6fed4e45f..fc2064bd688490765b977eca777245986274d268 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -33,6 +33,9 @@ const char *x_aarch64_override_tune_string TargetVariable unsigned long aarch64_isa_flags = 0 +TargetVariable +unsigned aarch64_enable_bti = 2 + ; The TLS dialect names to use with -mtls-dialect. Enum diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ecb19f4e59329b6b3278f1fed09730909edaa377..9e322b79a9f3405bac6b3a3c4b6cb15a61bef7a3 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -15238,6 +15238,7 @@ functions will practically always do this) using the a-key. The optional argument @samp{leaf} can be used to extend the signing to include leaf functions. The optional argument @samp{b-key} can be used to sign the functions with the B-key instead of the A-key. +@samp{bti} turns on branch target identification mechanism. @item -msve-vector-bits=@var{bits} @opindex msve-vector-bits