| Message ID | 20180820141116.9118-23-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | MPS devices: FPGAIO, timer, watchdogs, MSC, DMA, SPI | expand |
On 08/20/2018 07:11 AM, Peter Maydell wrote: > + mmc->scc_id = 0x41040000 | (0x505 << 4); Is it any less clear to say 0x41045050? Otherwise, Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 23 August 2018 at 18:42, Richard Henderson <richard.henderson@linaro.org> wrote: > On 08/20/2018 07:11 AM, Peter Maydell wrote: >> + mmc->scc_id = 0x41040000 | (0x505 << 4); > > Is it any less clear to say 0x41045050? It makes it a bit clearer that that field is the number from the image name, I think. (Compare the an385 and an511 init functions, which I notice I also need to update to fix the equivalent bug there.) thanks -- PMM
On 23 August 2018 at 18:45, Peter Maydell <peter.maydell@linaro.org> wrote: > On 23 August 2018 at 18:42, Richard Henderson > <richard.henderson@linaro.org> wrote: >> On 08/20/2018 07:11 AM, Peter Maydell wrote: >>> + mmc->scc_id = 0x41040000 | (0x505 << 4); >> >> Is it any less clear to say 0x41045050? > > It makes it a bit clearer that that field is the number > from the image name, I think. (Compare the an385 > and an511 init functions, which I notice I also need > to update to fix the equivalent bug there.) ...though I guess that's less true now we're using a hex constant rather than decimal. So yeah, we could just say 0x41045050. thanks -- PMM
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index cedf605e20e..cb252d8ebcc 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -192,7 +192,7 @@ static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque, sccdev = DEVICE(scc); qdev_set_parent_bus(sccdev, sysbus_get_default()); qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2); - qdev_prop_set_uint32(sccdev, "scc-aid", 0x02000008); + qdev_prop_set_uint32(sccdev, "scc-aid", 0x00200008); qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id); object_property_set_bool(OBJECT(scc), true, "realized", &error_fatal); return sysbus_mmio_get_region(SYS_BUS_DEVICE(sccdev), 0); @@ -604,7 +604,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data) mc->desc = "ARM MPS2 with AN505 FPGA image for Cortex-M33"; mmc->fpga_type = FPGA_AN505; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); - mmc->scc_id = 0x41040000 | (505 << 4); + mmc->scc_id = 0x41040000 | (0x505 << 4); } static const TypeInfo mps2tz_info = {
Some of the config register values we were setting for the MPS2 SCC weren't correct: * the SCC_AID bits [23:20] specify the FPGA build target board revision, and the SCC_CFG4 register specifies the actual board revision, so these should have matching values. Claim to be board revision C, consistently -- we had the revision in the wrong part of SCC_AID. * SCC_ID bits [15:4] should be 0x505, not decimal 505 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm/mps2-tz.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)