| Message ID | 1531226879-11802-3-git-send-email-avienamo@nvidia.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Tegra PMC pinctrl pad configuration | expand |
On 10/07/18 13:47, Aapo Vienamo wrote: > Factor out the the code to calculate the correct DPD register and bit > number for a given pad. This logic will be needed to query the status > register. > > Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> > --- > drivers/soc/tegra/pmc.c | 20 +++++++++++++++++--- > 1 file changed, 17 insertions(+), 3 deletions(-) > > diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c > index 5bea3b9..83b39cd 100644 > --- a/drivers/soc/tegra/pmc.c > +++ b/drivers/soc/tegra/pmc.c > @@ -922,11 +922,12 @@ tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id) > return NULL; > } > > -static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, > - unsigned long *status, u32 *mask) > +static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id, > + unsigned long *request, > + unsigned long *status, > + u32 *mask) > { > const struct tegra_io_pad_soc *pad; > - unsigned long rate, value; > > pad = tegra_io_pad_find(pmc, id); > if (!pad) { > @@ -947,6 +948,19 @@ static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, > *request = pmc->soc->regs->dpd2_req; > } > > + return 0; > +} > + > +static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, > + unsigned long *status, u32 *mask) > +{ > + unsigned long rate, value; > + int err; > + > + err = tegra_io_pad_get_dpd_register_bit(id, request, status, mask); > + if (err) > + return err; > + > if (pmc->clk) { > rate = clk_get_rate(pmc->clk); > if (!rate) { > Acked-by: Jon Hunter <jonathanh@nvidia.com> Cheers Jon
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 5bea3b9..83b39cd 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -922,11 +922,12 @@ tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id) return NULL; } -static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, - unsigned long *status, u32 *mask) +static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id, + unsigned long *request, + unsigned long *status, + u32 *mask) { const struct tegra_io_pad_soc *pad; - unsigned long rate, value; pad = tegra_io_pad_find(pmc, id); if (!pad) { @@ -947,6 +948,19 @@ static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, *request = pmc->soc->regs->dpd2_req; } + return 0; +} + +static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, + unsigned long *status, u32 *mask) +{ + unsigned long rate, value; + int err; + + err = tegra_io_pad_get_dpd_register_bit(id, request, status, mask); + if (err) + return err; + if (pmc->clk) { rate = clk_get_rate(pmc->clk); if (!rate) {
Factor out the the code to calculate the correct DPD register and bit number for a given pad. This logic will be needed to query the status register. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> --- drivers/soc/tegra/pmc.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-)