diff mbox series

[U-Boot,1/2] i2c: at91_i2c: Wait for TXRDY after sending the first byte

Message ID 20171129032524.14431-2-alan@softiron.com
State Accepted
Commit 0afbb0e1c01382f4bcd728ecbd4e49a928dbbccb
Delegated to: Heiko Schocher
Headers show
Series Fix the I2C on SAMA5D3 | expand

Commit Message

Alan Ott Nov. 29, 2017, 3:25 a.m. UTC
The driver must wait for TXRDY after each byte is pushed into
the i2c FIFO before pushing the next byte. Previously this was
not done for the first byte, causing a race condition with zeros
sometimes being sent for the next byte (which is typically the
first actual data byte).

Signed-off-by: Alan Ott <alan@softiron.com>
---
 drivers/i2c/at91_i2c.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Wenyou Yang Nov. 30, 2017, 1:14 a.m. UTC | #1
On 2017/11/29 11:25, Alan Ott wrote:
> The driver must wait for TXRDY after each byte is pushed into
> the i2c FIFO before pushing the next byte. Previously this was
> not done for the first byte, causing a race condition with zeros
> sometimes being sent for the next byte (which is typically the
> first actual data byte).
>
> Signed-off-by: Alan Ott <alan@softiron.com>
> ---
Acked-by:  Wenyou Yang <wenyou.yang@microchip.com>

Thank you for your patch.

>   drivers/i2c/at91_i2c.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
> index d394044..20d0929 100644
> --- a/drivers/i2c/at91_i2c.c
> +++ b/drivers/i2c/at91_i2c.c
> @@ -72,6 +72,8 @@ static int at91_i2c_xfer_msg(struct at91_i2c_bus *bus, struct i2c_msg *msg)
>   
>   	} else {
>   		writel(msg->buf[0], &reg->thr);
> +		ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);
> +
>   		for (i = 1; !ret && (i < msg->len); i++) {
>   			writel(msg->buf[i], &reg->thr);
>   			ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);

Best Regards,
Wenyou Yang
Heiko Schocher Dec. 7, 2017, 8:26 a.m. UTC | #2
Hello Alan,

Am 29.11.2017 um 04:25 schrieb Alan Ott:
> The driver must wait for TXRDY after each byte is pushed into
> the i2c FIFO before pushing the next byte. Previously this was
> not done for the first byte, causing a race condition with zeros
> sometimes being sent for the next byte (which is typically the
> first actual data byte).
> 
> Signed-off-by: Alan Ott <alan@softiron.com>
> ---
>   drivers/i2c/at91_i2c.c | 2 ++
>   1 file changed, 2 insertions(+)

Thanks!

Reviewed-by: Heiko Schocher <hs@denx.de>

bye,
Heiko
Heiko Schocher Dec. 7, 2017, 12:21 p.m. UTC | #3
Hello Alan,

Am 29.11.2017 um 04:25 schrieb Alan Ott:
> The driver must wait for TXRDY after each byte is pushed into
> the i2c FIFO before pushing the next byte. Previously this was
> not done for the first byte, causing a race condition with zeros
> sometimes being sent for the next byte (which is typically the
> first actual data byte).
> 
> Signed-off-by: Alan Ott <alan@softiron.com>
> ---
>   drivers/i2c/at91_i2c.c | 2 ++
>   1 file changed, 2 insertions(+)

Applied to u-boot-i2c master

Thanks!

bye,
Heiko
diff mbox series

Patch

diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index d394044..20d0929 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -72,6 +72,8 @@  static int at91_i2c_xfer_msg(struct at91_i2c_bus *bus, struct i2c_msg *msg)
 
 	} else {
 		writel(msg->buf[0], &reg->thr);
+		ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);
+
 		for (i = 1; !ret && (i < msg->len); i++) {
 			writel(msg->buf[i], &reg->thr);
 			ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);