diff mbox series

[PULL,07/20] target/arm: Restore security state on exception return

Message ID 1507305585-20608-8-git-send-email-peter.maydell@linaro.org
State New
Headers show
Series [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI | expand

Commit Message

Peter Maydell Oct. 6, 2017, 3:59 p.m. UTC 
Now that we can handle the CONTROL.SPSEL bit not necessarily being
in sync with the current stack pointer, we can restore the correct
security state on exception return. This happens before we start
to read registers off the stack frame, but after we have taken
possible usage faults for bad exception return magic values and
updated CONTROL.SPSEL.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1506092407-26985-5-git-send-email-peter.maydell@linaro.org
---
 target/arm/helper.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 36173e2..b82fc9f 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6381,6 +6381,8 @@  static void do_v7m_exception_exit(ARMCPU *cpu)
      */
     write_v7m_control_spsel(env, return_to_sp_process);
 
+    switch_v7m_security_state(env, return_to_secure);
+
     {
         /* The stack pointer we should be reading the exception frame from
          * depends on bits in the magic exception return type value (and