diff mbox series

powerpc: Fix workaround for spurious MCE on POWER9

Message ID 20170929033735.28710-1-mikey@neuling.org (mailing list archive)
State Accepted
Commit bca73f595a566f0262967535bb5b2ea9c4271d9a
Headers show
Series powerpc: Fix workaround for spurious MCE on POWER9 | expand

Commit Message

Michael Neuling Sept. 29, 2017, 3:37 a.m. UTC 
In the recent commit:
  d8bd9f3f09 powerpc: Handle MCE on POWER9 with only DSISR bit 30 set
I screwed up the bit.  It should be bit 25 (IBM bit 38).

Signed-off-by: Michael Neuling <mikey@neuling.org>
---
 arch/powerpc/kernel/mce_power.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Michael Ellerman Sept. 29, 2017, 2:05 p.m. UTC | #1 
On Fri, 2017-09-29 at 03:37:35 UTC, Michael Neuling wrote:
> In the recent commit:
>   d8bd9f3f09 powerpc: Handle MCE on POWER9 with only DSISR bit 30 set
> I screwed up the bit.  It should be bit 25 (IBM bit 38).
> 
> Signed-off-by: Michael Neuling <mikey@neuling.org>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/bca73f595a566f0262967535bb5b2e

cheers
diff mbox series

Patch

diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index f523125b9d..72f153c6f3 100644
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -626,7 +626,7 @@  long __machine_check_early_realmode_p9(struct pt_regs *regs)
 {
 	/*
 	 * On POWER9 DD2.1 and below, it's possible to get a machine check
-	 * caused by a paste instruction where only DSISR bit 30 is set. This
+	 * caused by a paste instruction where only DSISR bit 25 is set. This
 	 * will result in the MCE handler seeing an unknown event and the kernel
 	 * crashing. An MCE that occurs like this is spurious, so we don't need
 	 * to do anything in terms of servicing it. If there is something that
@@ -634,7 +634,7 @@  long __machine_check_early_realmode_p9(struct pt_regs *regs)
 	 * correct DSISR so that it can be serviced properly. So detect this
 	 * case and mark it as handled.
 	 */
-	if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x40000000)
+	if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000)
 		return 1;
 
 	return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table);