diff mbox series

[U-Boot] ARM: mvebu: handle unused DRAM banks with ECC enabled

Message ID 20170922165031.3447-1-judge.packham@gmail.com
State Accepted
Commit c3ab2744447db80de3c0a18422256a7b638253b3
Headers show
Series [U-Boot] ARM: mvebu: handle unused DRAM banks with ECC enabled | expand

Commit Message

Chris Packham Sept. 22, 2017, 4:50 p.m. UTC
dram_ecc_scrubbing() had code to skip unused DRAM banks but it would not
work because mvebu_sdram_bs() returns 0 and the code was subtracting 1
before checking the size. Remove the -1 from the bank size and the +1
from the total which will skip unused banks and still calculate the
correct size. Put the -1 where it is needed for scrubbing via the xor
engine.

Reported-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
---

 arch/arm/mach-mvebu/dram.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Joshua Scott Sept. 24, 2017, 10:07 p.m. UTC | #1
I can confirm that this patch fixes the issue I was seeing (data_abort, single and dual-bit ecc errors during dram_ecc_scrubbing).

Tested on a board with the Marvell AlleyCat3 switch/SoC.


Cheers,
Joshua Scott
Stefan Roese Sept. 26, 2017, 8:47 a.m. UTC | #2
On 22.09.2017 18:50, Chris Packham wrote:
> dram_ecc_scrubbing() had code to skip unused DRAM banks but it would not
> work because mvebu_sdram_bs() returns 0 and the code was subtracting 1
> before checking the size. Remove the -1 from the bank size and the +1
> from the total which will skip unused banks and still calculate the
> correct size. Put the -1 where it is needed for scrubbing via the xor
> engine.
> 
> Reported-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
> Signed-off-by: Chris Packham <judge.packham@gmail.com>

Applied to u-boot-marvell/master.

Thanks,
Stefan
diff mbox series

Patch

diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c
index e3f304c366..f946c0cffe 100644
--- a/arch/arm/mach-mvebu/dram.c
+++ b/arch/arm/mach-mvebu/dram.c
@@ -179,11 +179,11 @@  static void dram_ecc_scrubbing(void)
 	reg_write(REG_SDRAM_CONFIG_ADDR, temp);
 
 	for (cs = 0; cs < CONFIG_NR_DRAM_BANKS; cs++) {
-		size = mvebu_sdram_bs(cs) - 1;
+		size = mvebu_sdram_bs(cs);
 		if (size == 0)
 			continue;
 
-		total = (u64)size + 1;
+		total = (u64)size;
 		total_mem += (u32)(total / (1 << 30));
 		start_addr = 0;
 		mv_xor_init2(cs);
@@ -194,7 +194,7 @@  static void dram_ecc_scrubbing(void)
 			size -= start_addr;
 		}
 
-		mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size,
+		mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size - 1,
 				SCRUB_MAGIC, SCRUB_MAGIC);
 
 		/* Wait for previous transfer completion */