| Message ID | 1501131242-14951-1-git-send-email-kever.yang@rock-chips.com |
|---|---|
| State | Accepted |
| Delegated to: | Philipp Tomsich |
| Headers | show |
> Disable the ddr secure region setting in SPL and the ddr memory > becomes non-secure, every one can access it. the trust firmware > like OPTEE should have the correct setting for it after SPL if > there is one. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > Changes in v2: > - add comment for the change and update the commit message > > arch/arm/mach-rockchip/rk322x-board-spl.c | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> Disable the ddr secure region setting in SPL and the ddr memory > becomes non-secure, every one can access it. the trust firmware > like OPTEE should have the correct setting for it after SPL if > there is one. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > Changes in v2: > - add comment for the change and update the commit message > > arch/arm/mach-rockchip/rk322x-board-spl.c | 4 ++++ > 1 file changed, 4 insertions(+) > Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> Disable the ddr secure region setting in SPL and the ddr memory > becomes non-secure, every one can access it. the trust firmware > like OPTEE should have the correct setting for it after SPL if > there is one. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> > Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> > --- > > Changes in v2: > - add comment for the change and update the commit message > > arch/arm/mach-rockchip/rk322x-board-spl.c | 4 ++++ > 1 file changed, 4 insertions(+) > Applied to u-boot-rockchip, thanks!
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index 15216c7..4ddb8ba 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -41,6 +41,8 @@ static struct rk322x_grf * const grf = (void *)GRF_BASE; CON_IOMUX_UART2SEL_MASK, CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); } + +#define SGRF_DDR_CON0 0x10150000 void board_init_f(ulong dummy) { struct udevice *dev; @@ -71,6 +73,8 @@ void board_init_f(ulong dummy) return; } + /* Disable the ddr secure region setting to make it non-secure */ + rk_clrreg(SGRF_DDR_CON0, 0x4000); #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(); #endif
Disable the ddr secure region setting in SPL and the ddr memory becomes non-secure, every one can access it. the trust firmware like OPTEE should have the correct setting for it after SPL if there is one. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> --- Changes in v2: - add comment for the change and update the commit message arch/arm/mach-rockchip/rk322x-board-spl.c | 4 ++++ 1 file changed, 4 insertions(+)