| Message ID | 1499770669-9255-1-git-send-email-maddy@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 20dd4c624d25156d5ec3345bbb690b98175ef879 |
| Headers | show |
On Tue, 2017-07-11 at 10:57:49 UTC, Madhavan Srinivasan wrote: > Incase of continous sampling, code currently defaults > MMCRA[SDAR_MODE] to 0b01 for power9 DD1 which is > 'Continous sampling mode update SDAR on TLB miss'. > And for the rest it copies the sdar_mode value from > the event code, which mostly turns out to be 0b00 > ('No Updates'). > > Instead, fix the sdar_mode to 0b10 > ('Continous sampling mode update SDAR on dcache miss') > as default for power9 incase of continous sampling. > > Fixes: 78b4416aa2493 ('powerpc/perf: Handle sdar_mode for marked event in power9') > Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/20dd4c624d25156d5ec3345bbb690b cheers
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c index 8125160be7bc..ae0cd2a29e68 100644 --- a/arch/powerpc/perf/isa207-common.c +++ b/arch/powerpc/perf/isa207-common.c @@ -90,14 +90,16 @@ static void mmcra_sdar_mode(u64 event, unsigned long *mmcra) * MMCRA[SDAR_MODE] will be set to 0b01 * For rest * MMCRA[SDAR_MODE] will be set from event code. + * If sdar_mode from raw code is zero, default to 0b10. */ if (cpu_has_feature(CPU_FTR_ARCH_300)) { if (is_event_marked(event) || (*mmcra & MMCRA_SAMPLE_ENABLE)) *mmcra &= MMCRA_SDAR_MODE_NO_UPDATES; - else if (!cpu_has_feature(CPU_FTR_POWER9_DD1)) + else if ((!cpu_has_feature(CPU_FTR_POWER9_DD1) && + p9_SDAR_MODE(event))) *mmcra |= p9_SDAR_MODE(event) << MMCRA_SDAR_MODE_SHIFT; - else if (cpu_has_feature(CPU_FTR_POWER9_DD1)) - *mmcra |= MMCRA_SDAR_MODE_TLB; + else + *mmcra |= MMCRA_SDAR_MODE_DCACHE; } else *mmcra |= MMCRA_SDAR_MODE_TLB; } diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h index 8acbe6e802c7..250d91f4d642 100644 --- a/arch/powerpc/perf/isa207-common.h +++ b/arch/powerpc/perf/isa207-common.h @@ -246,6 +246,7 @@ #define MMCRA_THR_CMP_SHIFT 32 #define MMCRA_SDAR_MODE_SHIFT 42 #define MMCRA_SDAR_MODE_TLB (1ull << MMCRA_SDAR_MODE_SHIFT) +#define MMCRA_SDAR_MODE_DCACHE (2ull << MMCRA_SDAR_MODE_SHIFT) #define MMCRA_SDAR_MODE_NO_UPDATES ~(0x3ull << MMCRA_SDAR_MODE_SHIFT) #define MMCRA_IFM_SHIFT 30 #define MMCRA_THR_CTR_MANT_SHIFT 19
Incase of continous sampling, code currently defaults MMCRA[SDAR_MODE] to 0b01 for power9 DD1 which is 'Continous sampling mode update SDAR on TLB miss'. And for the rest it copies the sdar_mode value from the event code, which mostly turns out to be 0b00 ('No Updates'). Instead, fix the sdar_mode to 0b10 ('Continous sampling mode update SDAR on dcache miss') as default for power9 incase of continous sampling. Fixes: 78b4416aa2493 ('powerpc/perf: Handle sdar_mode for marked event in power9') Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- arch/powerpc/perf/isa207-common.c | 8 +++++--- arch/powerpc/perf/isa207-common.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-)