| Message ID | 1494828447-24332-1-git-send-email-xzy.xu@rock-chips.com |
|---|---|
| State | Not Applicable |
| Delegated to: | Jaehoon Chung |
| Headers | show |
Hi Ziyuan, On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: > The original implementation select HS timing by default, add available > type selection for higher speed mode compatibility, such as hs200, > hs400, hs400es. > > By the way, we assume that card run at 1.8V or 1.2V I/O when its timing > is ddr52/hs200/hs400(es). > > Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> > --- > > drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- > include/mmc.h | 16 +++++++++++++++ > 2 files changed, 74 insertions(+), 1 deletion(-) > Is there a cover letter for this series, please? I just reviewed an MMC series at add higher speed support. I'm not sure but I suspect these overlap. Regards, Simon
hi Simon & Jaehoon, On 05/16/2017 08:18 AM, Simon Glass wrote: > Hi Ziyuan, > > On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >> The original implementation select HS timing by default, add available >> type selection for higher speed mode compatibility, such as hs200, >> hs400, hs400es. >> >> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >> is ddr52/hs200/hs400(es). >> >> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >> --- >> >> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >> include/mmc.h | 16 +++++++++++++++ >> 2 files changed, 74 insertions(+), 1 deletion(-) >> > Is there a cover letter for this series, please? This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. It's only valid in U-Boot stage, we still use 'High Speed' in SPL. I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). > > I just reviewed an MMC series at add higher speed support. I'm not > sure but I suspect these overlap. Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. But some details are not the same as mine. Anyway, what do you think? > > Regards, > Simon > > >
Hi Ziyuan, On 05/16/2017 10:15 AM, Ziyuan wrote: > hi Simon & Jaehoon, > > On 05/16/2017 08:18 AM, Simon Glass wrote: >> Hi Ziyuan, >> >> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>> The original implementation select HS timing by default, add available >>> type selection for higher speed mode compatibility, such as hs200, >>> hs400, hs400es. >>> >>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>> is ddr52/hs200/hs400(es). >>> >>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>> --- >>> >>> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>> include/mmc.h | 16 +++++++++++++++ >>> 2 files changed, 74 insertions(+), 1 deletion(-) >>> >> Is there a cover letter for this series, please? > > This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. > It's only valid in U-Boot stage, we still use 'High Speed' in SPL. > > I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >> >> I just reviewed an MMC series at add higher speed support. I'm not >> sure but I suspect these overlap. > > Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. > But some details are not the same as mine. Anyway, what do you think? I didn't review both yet..After checking, i will share my opinion. how about? > >> >> Regards, >> Simon >> >> >> > > > > >
hi Jaehoon, On 05/16/2017 09:55 AM, Jaehoon Chung wrote: > Hi Ziyuan, > > On 05/16/2017 10:15 AM, Ziyuan wrote: >> hi Simon & Jaehoon, >> >> On 05/16/2017 08:18 AM, Simon Glass wrote: >>> Hi Ziyuan, >>> >>> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>>> The original implementation select HS timing by default, add available >>>> type selection for higher speed mode compatibility, such as hs200, >>>> hs400, hs400es. >>>> >>>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>>> is ddr52/hs200/hs400(es). >>>> >>>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>>> --- >>>> >>>> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>>> include/mmc.h | 16 +++++++++++++++ >>>> 2 files changed, 74 insertions(+), 1 deletion(-) >>>> >>> Is there a cover letter for this series, please? >> This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. >> It's only valid in U-Boot stage, we still use 'High Speed' in SPL. >> >> I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >>> I just reviewed an MMC series at add higher speed support. I'm not >>> sure but I suspect these overlap. >> Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. >> But some details are not the same as mine. Anyway, what do you think? > I didn't review both yet..After checking, i will share my opinion. how about? Fine, I look forward to your opinion. > >>> Regards, >>> Simon >>> >>> >>> >> >> >> >> > > >
Hi, On 15 May 2017 at 19:15, Ziyuan <xzy.xu@rock-chips.com> wrote: > hi Simon & Jaehoon, > > On 05/16/2017 08:18 AM, Simon Glass wrote: >> >> Hi Ziyuan, >> >> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>> >>> The original implementation select HS timing by default, add available >>> type selection for higher speed mode compatibility, such as hs200, >>> hs400, hs400es. >>> >>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>> is ddr52/hs200/hs400(es). >>> >>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>> --- >>> >>> drivers/mmc/mmc.c | 59 >>> ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>> include/mmc.h | 16 +++++++++++++++ >>> 2 files changed, 74 insertions(+), 1 deletion(-) >>> >> Is there a cover letter for this series, please? > > > This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes > some bug for dw_mmc & sdhci controller. > It's only valid in U-Boot stage, we still use 'High Speed' in SPL. > > I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >> >> >> I just reviewed an MMC series at add higher speed support. I'm not >> sure but I suspect these overlap. > > > Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It > looks to me. > But some details are not the same as mine. Anyway, what do you think? I think the other series should go in first, so if there are conflicts can you rebase on top of it? Regards, Simon
hi Jaehoon, On 05/16/2017 09:55 AM, Jaehoon Chung wrote: > Hi Ziyuan, > > On 05/16/2017 10:15 AM, Ziyuan wrote: >> hi Simon & Jaehoon, >> >> On 05/16/2017 08:18 AM, Simon Glass wrote: >>> Hi Ziyuan, >>> >>> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>>> The original implementation select HS timing by default, add available >>>> type selection for higher speed mode compatibility, such as hs200, >>>> hs400, hs400es. >>>> >>>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>>> is ddr52/hs200/hs400(es). >>>> >>>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>>> --- >>>> >>>> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>>> include/mmc.h | 16 +++++++++++++++ >>>> 2 files changed, 74 insertions(+), 1 deletion(-) >>>> >>> Is there a cover letter for this series, please? >> This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. >> It's only valid in U-Boot stage, we still use 'High Speed' in SPL. >> >> I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >>> I just reviewed an MMC series at add higher speed support. I'm not >>> sure but I suspect these overlap. >> Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. >> But some details are not the same as mine. Anyway, what do you think? > I didn't review both yet..After checking, i will share my opinion. how about? *ping*... Did you test this patchset on Samsung platform? As far as I know, Samsung SoCs also make use of dw_mmc and sdhci controllers. > >>> Regards, >>> Simon >>> >>> >>> >> >> >> >> > > >
On 05/25/2017 05:12 PM, Ziyuan wrote: > hi Jaehoon, > > On 05/16/2017 09:55 AM, Jaehoon Chung wrote: >> Hi Ziyuan, >> >> On 05/16/2017 10:15 AM, Ziyuan wrote: >>> hi Simon & Jaehoon, >>> >>> On 05/16/2017 08:18 AM, Simon Glass wrote: >>>> Hi Ziyuan, >>>> >>>> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>>>> The original implementation select HS timing by default, add available >>>>> type selection for higher speed mode compatibility, such as hs200, >>>>> hs400, hs400es. >>>>> >>>>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>>>> is ddr52/hs200/hs400(es). >>>>> >>>>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>>>> --- >>>>> >>>>> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>>>> include/mmc.h | 16 +++++++++++++++ >>>>> 2 files changed, 74 insertions(+), 1 deletion(-) >>>>> >>>> Is there a cover letter for this series, please? >>> This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. >>> It's only valid in U-Boot stage, we still use 'High Speed' in SPL. >>> >>> I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >>>> I just reviewed an MMC series at add higher speed support. I'm not >>>> sure but I suspect these overlap. >>> Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. >>> But some details are not the same as mine. Anyway, what do you think? >> I didn't review both yet..After checking, i will share my opinion. how about? > > *ping*... > Did you test this patchset on Samsung platform? As far as I know, Samsung SoCs also make use of dw_mmc and sdhci controllers. Sorry for late..Sure I will test this..Thanks for kindly ping. Best Regards, Jaehoon Chung > >> >>>> Regards, >>>> Simon >>>> >>>> >>>> >>> >>> >>> >>> >> >> >> > > > > >
Hi Ziyuan, On 05/25/2017 05:12 PM, Ziyuan wrote: > hi Jaehoon, > > On 05/16/2017 09:55 AM, Jaehoon Chung wrote: >> Hi Ziyuan, >> >> On 05/16/2017 10:15 AM, Ziyuan wrote: >>> hi Simon & Jaehoon, >>> >>> On 05/16/2017 08:18 AM, Simon Glass wrote: >>>> Hi Ziyuan, >>>> >>>> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>>>> The original implementation select HS timing by default, add available >>>>> type selection for higher speed mode compatibility, such as hs200, >>>>> hs400, hs400es. >>>>> >>>>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>>>> is ddr52/hs200/hs400(es). >>>>> >>>>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>>>> --- >>>>> >>>>> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>>>> include/mmc.h | 16 +++++++++++++++ >>>>> 2 files changed, 74 insertions(+), 1 deletion(-) >>>>> >>>> Is there a cover letter for this series, please? >>> This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. >>> It's only valid in U-Boot stage, we still use 'High Speed' in SPL. >>> >>> I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >>>> I just reviewed an MMC series at add higher speed support. I'm not >>>> sure but I suspect these overlap. >>> Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. >>> But some details are not the same as mine. Anyway, what do you think? >> I didn't review both yet..After checking, i will share my opinion. how about? > > *ping*... > Did you test this patchset on Samsung platform? As far as I know, Samsung SoCs also make use of dw_mmc and sdhci controllers. some details are not the same as yours..but some points are duplicated. DWMMC and sdhci controller side are not duplicated.. As i am feeling..your patches are based on Linux kernel code..right? > >> >>>> Regards, >>>> Simon >>>> >>>> >>>> >>> >>> >>> >>> >> >> >> > > > > >
hi Jaehoon, On 05/25/2017 09:08 PM, Jaehoon Chung wrote: > Hi Ziyuan, > > On 05/25/2017 05:12 PM, Ziyuan wrote: >> hi Jaehoon, >> >> On 05/16/2017 09:55 AM, Jaehoon Chung wrote: >>> Hi Ziyuan, >>> >>> On 05/16/2017 10:15 AM, Ziyuan wrote: >>>> hi Simon & Jaehoon, >>>> >>>> On 05/16/2017 08:18 AM, Simon Glass wrote: >>>>> Hi Ziyuan, >>>>> >>>>> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>>>>> The original implementation select HS timing by default, add available >>>>>> type selection for higher speed mode compatibility, such as hs200, >>>>>> hs400, hs400es. >>>>>> >>>>>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>>>>> is ddr52/hs200/hs400(es). >>>>>> >>>>>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>>>>> --- >>>>>> >>>>>> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>>>>> include/mmc.h | 16 +++++++++++++++ >>>>>> 2 files changed, 74 insertions(+), 1 deletion(-) >>>>>> >>>>> Is there a cover letter for this series, please? >>>> This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. >>>> It's only valid in U-Boot stage, we still use 'High Speed' in SPL. >>>> >>>> I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >>>>> I just reviewed an MMC series at add higher speed support. I'm not >>>>> sure but I suspect these overlap. >>>> Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. >>>> But some details are not the same as mine. Anyway, what do you think? >>> I didn't review both yet..After checking, i will share my opinion. how about? >> *ping*... >> Did you test this patchset on Samsung platform? As far as I know, Samsung SoCs also make use of dw_mmc and sdhci controllers. > some details are not the same as yours..but some points are duplicated. > DWMMC and sdhci controller side are not duplicated.. > > As i am feeling..your patches are based on Linux kernel code..right? Yup, the kernel's mmc driver is stabilized and it was tested on so many various boards. Simon had review Jean-jacques's patch, but a little glitch need to be debugged. So I should wait for him, and rebase? >>>>> Regards, >>>>> Simon >>>>> >>>>> >>>>> >>>> >>>> >>>> >>> >>> >> >> >> >> > > >
Hi Ziyuan, On 06/05/2017 09:50 AM, Ziyuan wrote: > hi Jaehoon, > > On 05/25/2017 09:08 PM, Jaehoon Chung wrote: >> Hi Ziyuan, >> >> On 05/25/2017 05:12 PM, Ziyuan wrote: >>> hi Jaehoon, >>> >>> On 05/16/2017 09:55 AM, Jaehoon Chung wrote: >>>> Hi Ziyuan, >>>> >>>> On 05/16/2017 10:15 AM, Ziyuan wrote: >>>>> hi Simon & Jaehoon, >>>>> >>>>> On 05/16/2017 08:18 AM, Simon Glass wrote: >>>>>> Hi Ziyuan, >>>>>> >>>>>> On 15 May 2017 at 00:06, Ziyuan Xu <xzy.xu@rock-chips.com> wrote: >>>>>>> The original implementation select HS timing by default, add available >>>>>>> type selection for higher speed mode compatibility, such as hs200, >>>>>>> hs400, hs400es. >>>>>>> >>>>>>> By the way, we assume that card run at 1.8V or 1.2V I/O when its timing >>>>>>> is ddr52/hs200/hs400(es). >>>>>>> >>>>>>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> >>>>>>> --- >>>>>>> >>>>>>> drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- >>>>>>> include/mmc.h | 16 +++++++++++++++ >>>>>>> 2 files changed, 74 insertions(+), 1 deletion(-) >>>>>>> >>>>>> Is there a cover letter for this series, please? >>>>> This patchset is used for hs200/hs400/ddr52 mode of eMMC device, and fixes some bug for dw_mmc & sdhci controller. >>>>> It's only valid in U-Boot stage, we still use 'High Speed' in SPL. >>>>> >>>>> I tested it on evb-rk3288 board(eMMC 4.5) and evb-rk3388 board(eMMC 5.0). >>>>>> I just reviewed an MMC series at add higher speed support. I'm not >>>>>> sure but I suspect these overlap. >>>>> Ha, I just reviewed Vignesh's patches, it focuses on uhs mode of sd card. It looks to me. >>>>> But some details are not the same as mine. Anyway, what do you think? >>>> I didn't review both yet..After checking, i will share my opinion. how about? >>> *ping*... >>> Did you test this patchset on Samsung platform? As far as I know, Samsung SoCs also make use of dw_mmc and sdhci controllers. >> some details are not the same as yours..but some points are duplicated. >> DWMMC and sdhci controller side are not duplicated.. >> >> As i am feeling..your patches are based on Linux kernel code..right? > > Yup, the kernel's mmc driver is stabilized and it was tested on so many various boards. > Simon had review Jean-jacques's patch, but a little glitch need to be debugged. So I should wait for him, and rebase? I will make a branch for testing about HS200 and UHS-I..then you can make the patches based on it. Well, after making branch, i will share it at mailing. Thanks for your effort! Best Regards, Jaehoon Chung > >>>>>> Regards, >>>>>> Simon >>>>>> >>>>>> >>>>>> >>>>> >>>>> >>>>> >>>> >>>> >>> >>> >>> >>> >> >> >> > > > > >
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 72fc177..f5b2280 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -546,10 +546,62 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) } +static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd) +{ + u8 card_type; + u32 host_caps, avail_type = 0; + + card_type = ext_csd[EXT_CSD_CARD_TYPE]; + host_caps = mmc->cfg->host_caps; + + if ((host_caps & MMC_MODE_HS) && + (card_type & EXT_CSD_CARD_TYPE_26)) + avail_type |= EXT_CSD_CARD_TYPE_26; + + if ((host_caps & MMC_MODE_HS) && + (card_type & EXT_CSD_CARD_TYPE_52)) + avail_type |= EXT_CSD_CARD_TYPE_52; + + /* + * For the moment, u-boot doesn't support signal voltage + * switch, therefor we assume that host support ddr52 + * at 1.8v or 3.3v I/O(1.2v I/O not supported, hs200 and + * hs400 are the same). + */ + if ((host_caps & MMC_MODE_DDR_52MHz) && + (card_type & EXT_CSD_CARD_TYPE_DDR_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_DDR_1_8V; + + if ((host_caps & MMC_MODE_HS200) && + (card_type & EXT_CSD_CARD_TYPE_HS200_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V; + + /* + * If host can support HS400, it means that host can also + * support HS200. + */ + if ((host_caps & MMC_MODE_HS400) && + (host_caps & MMC_MODE_8BIT) && + (card_type & EXT_CSD_CARD_TYPE_HS400_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V | + EXT_CSD_CARD_TYPE_HS400_1_8V; + + if ((host_caps & MMC_MODE_HS400ES) && + (host_caps & MMC_MODE_8BIT) && + ext_csd[EXT_CSD_STROBE_SUPPORT] && + (avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V)) + avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V | + EXT_CSD_CARD_TYPE_HS400_1_8V | + EXT_CSD_CARD_TYPE_HS400ES; + + return avail_type; +} + static int mmc_change_freq(struct mmc *mmc) { ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); char cardtype; + u32 avail_type; int err; mmc->card_caps = 0; @@ -569,8 +621,13 @@ static int mmc_change_freq(struct mmc *mmc) return err; cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; + avail_type = mmc_select_card_type(mmc, ext_csd); - err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); + if (avail_type & EXT_CSD_CARD_TYPE_HS) + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_HS_TIMING, 1); + else + err = -EINVAL; if (err) return err; diff --git a/include/mmc.h b/include/mmc.h index fad12d6..0bae1a1 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -58,6 +58,9 @@ #define MMC_MODE_8BIT (1 << 3) #define MMC_MODE_SPI (1 << 4) #define MMC_MODE_DDR_52MHz (1 << 5) +#define MMC_MODE_HS200 (1 << 6) +#define MMC_MODE_HS400 (1 << 7) +#define MMC_MODE_HS400ES (1 << 8) #define SD_DATA_4BIT 0x00040000 @@ -182,6 +185,7 @@ #define EXT_CSD_BOOT_BUS_WIDTH 177 #define EXT_CSD_PART_CONF 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_STROBE_SUPPORT 184 /* RO */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */ @@ -201,6 +205,18 @@ #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_26 | \ + EXT_CSD_CARD_TYPE_52) +#define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */ +#define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */ +#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ + EXT_CSD_CARD_TYPE_HS200_1_2V) +#define EXT_CSD_CARD_TYPE_HS400_1_8V BIT(6) /* Card can run at 200MHz DDR, 1.8V */ +#define EXT_CSD_CARD_TYPE_HS400_1_2V BIT(7) /* Card can run at 200MHz DDR, 1.2V */ +#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \ + EXT_CSD_CARD_TYPE_HS400_1_2V) +#define EXT_CSD_CARD_TYPE_HS400ES BIT(8) /* Card can run at HS400ES */ + #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
The original implementation select HS timing by default, add available type selection for higher speed mode compatibility, such as hs200, hs400, hs400es. By the way, we assume that card run at 1.8V or 1.2V I/O when its timing is ddr52/hs200/hs400(es). Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> --- drivers/mmc/mmc.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++++++- include/mmc.h | 16 +++++++++++++++ 2 files changed, 74 insertions(+), 1 deletion(-)