| Message ID | 20170513135753.8478-15-marek.vasut+renesas@gmail.com |
|---|---|
| State | Accepted |
| Commit | 8474681c3eb37f65c08eb9080cef817c38ee60c4 |
| Delegated to: | Nobuhiro Iwamatsu |
| Headers | show |
Applied to rmobile branch, thanks! 2017-05-13 22:57 GMT+09:00 Marek Vasut <marek.vasut@gmail.com>: > The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . > Use the internal clock and ignore the early version of the chip. > > Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> > Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> > --- > board/renesas/salvator-x/salvator-x.c | 4 ++-- > include/configs/salvator-x.h | 5 +++-- > scripts/config_whitelist.txt | 1 + > 3 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c > index 038d6de610..3f2bebf74f 100644 > --- a/board/renesas/salvator-x/salvator-x.c > +++ b/board/renesas/salvator-x/salvator-x.c > @@ -109,8 +109,8 @@ void reset_cpu(ulong addr) > static const struct sh_serial_platdata serial_platdata = { > .base = SCIF2_BASE, > .type = PORT_SCIF, > - .clk = 14745600, /* 0xE10000 */ > - .clk_mode = EXT_CLK, > + .clk = CONFIG_SH_SCIF_CLK_FREQ, > + .clk_mode = INT_CLK, > }; > > U_BOOT_DEVICE(salvator_x_scif2) = { > diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h > index 81a7226d62..94f62a7358 100644 > --- a/include/configs/salvator-x.h > +++ b/include/configs/salvator-x.h > @@ -20,7 +20,7 @@ > #define CONFIG_SCIF_CONSOLE > #define CONFIG_CONS_SCIF2 > #define CONFIG_CONS_INDEX 2 > -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ > +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ > > /* [A] Hyper Flash */ > /* use to RPC(SPI Multi I/O Bus Controller) */ > @@ -31,10 +31,11 @@ > #define RCAR_XTAL_CLK 33333333u > #define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK > /* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */ > -/* CPclk 16.66MHz, S3D2 133.33MHz */ > +/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */ > #define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) > #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2) > #define CONFIG_S3D2_CLK_FREQ (266666666u/2) > +#define CONFIG_S3D4_CLK_FREQ (266666666u/4) > > /* Generic Timer Definitions (use in assembler source) */ > #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ > diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt > index 7646bb6842..2ab6217433 100644 > --- a/scripts/config_whitelist.txt > +++ b/scripts/config_whitelist.txt > @@ -2396,6 +2396,7 @@ CONFIG_S3C24XX_TACLS > CONFIG_S3C24XX_TWRPH0 > CONFIG_S3C24XX_TWRPH1 > CONFIG_S3D2_CLK_FREQ > +CONFIG_S3D4_CLK_FREQ > CONFIG_S5P > CONFIG_S5PC100 > CONFIG_S5PC110 > -- > 2.11.0 >
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 038d6de610..3f2bebf74f 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -109,8 +109,8 @@ void reset_cpu(ulong addr) static const struct sh_serial_platdata serial_platdata = { .base = SCIF2_BASE, .type = PORT_SCIF, - .clk = 14745600, /* 0xE10000 */ - .clk_mode = EXT_CLK, + .clk = CONFIG_SH_SCIF_CLK_FREQ, + .clk_mode = INT_CLK, }; U_BOOT_DEVICE(salvator_x_scif2) = { diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 81a7226d62..94f62a7358 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -20,7 +20,7 @@ #define CONFIG_SCIF_CONSOLE #define CONFIG_CONS_SCIF2 #define CONFIG_CONS_INDEX 2 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ /* [A] Hyper Flash */ /* use to RPC(SPI Multi I/O Bus Controller) */ @@ -31,10 +31,11 @@ #define RCAR_XTAL_CLK 33333333u #define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK /* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */ -/* CPclk 16.66MHz, S3D2 133.33MHz */ +/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */ #define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2) #define CONFIG_S3D2_CLK_FREQ (266666666u/2) +#define CONFIG_S3D4_CLK_FREQ (266666666u/4) /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 7646bb6842..2ab6217433 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2396,6 +2396,7 @@ CONFIG_S3C24XX_TACLS CONFIG_S3C24XX_TWRPH0 CONFIG_S3C24XX_TWRPH1 CONFIG_S3D2_CLK_FREQ +CONFIG_S3D4_CLK_FREQ CONFIG_S5P CONFIG_S5PC100 CONFIG_S5PC110
The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . Use the internal clock and ignore the early version of the chip. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- board/renesas/salvator-x/salvator-x.c | 4 ++-- include/configs/salvator-x.h | 5 +++-- scripts/config_whitelist.txt | 1 + 3 files changed, 6 insertions(+), 4 deletions(-)