diff mbox

powerpc/mm: Add missing global TLBI if cxl is active

Message ID 20170329171942.14267-1-fbarrat@linux.vnet.ibm.com (mailing list archive)
State Accepted
Headers show

Commit Message

Frederic Barrat March 29, 2017, 5:19 p.m. UTC
Commit 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl") converted local
TLBIs to global if the cxl driver is active. It is necessary because
the CAPP snoops invalidations to forward them to the PSL on the cxl
adapter.
However one path was apparently forgotten. native_flush_hash_range()
still sends local TLBIs, as found out the hard way recently.

This patch fixes it by following the same logic as previously: if the
cxl driver is active, the local TLBIs are 'upgraded' to global.

Fixes: 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl")
Cc: stable@vger.kernel.org
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
---
 arch/powerpc/mm/hash_native_64.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Comments

Aneesh Kumar K.V April 4, 2017, 9:23 a.m. UTC | #1
Frederic Barrat <fbarrat@linux.vnet.ibm.com> writes:

> Commit 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl") converted local
> TLBIs to global if the cxl driver is active. It is necessary because
> the CAPP snoops invalidations to forward them to the PSL on the cxl
> adapter.
> However one path was apparently forgotten. native_flush_hash_range()
> still sends local TLBIs, as found out the hard way recently.
>
> This patch fixes it by following the same logic as previously: if the
> cxl driver is active, the local TLBIs are 'upgraded' to global.
>
> Fixes: 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl")
> Cc: stable@vger.kernel.org
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>

Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>

> ---
>  arch/powerpc/mm/hash_native_64.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
> index cc33260..65bb8f3 100644
> --- a/arch/powerpc/mm/hash_native_64.c
> +++ b/arch/powerpc/mm/hash_native_64.c
> @@ -638,6 +638,10 @@ static void native_flush_hash_range(unsigned long number, int local)
>  	unsigned long psize = batch->psize;
>  	int ssize = batch->ssize;
>  	int i;
> +	unsigned int use_local;
> +
> +	use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) &&
> +		mmu_psize_defs[psize].tlbiel && !cxl_ctx_in_use();
>
>  	local_irq_save(flags);
>
> @@ -667,8 +671,7 @@ static void native_flush_hash_range(unsigned long number, int local)
>  		} pte_iterate_hashed_end();
>  	}
>
> -	if (mmu_has_feature(MMU_FTR_TLBIEL) &&
> -	    mmu_psize_defs[psize].tlbiel && local) {
> +	if (use_local) {
>  		asm volatile("ptesync":::"memory");
>  		for (i = 0; i < number; i++) {
>  			vpn = batch->vpn[i];
> -- 
> 2.9.3
Michael Ellerman April 6, 2017, 1:23 p.m. UTC | #2
On Wed, 2017-03-29 at 17:19:42 UTC, Frederic Barrat wrote:
> Commit 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl") converted local
> TLBIs to global if the cxl driver is active. It is necessary because
> the CAPP snoops invalidations to forward them to the PSL on the cxl
> adapter.
> However one path was apparently forgotten. native_flush_hash_range()
> still sends local TLBIs, as found out the hard way recently.
> 
> This patch fixes it by following the same logic as previously: if the
> cxl driver is active, the local TLBIs are 'upgraded' to global.
> 
> Fixes: 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl")
> Cc: stable@vger.kernel.org
> Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/88b1bf7268f56887ca88eb09c6fb0f

cheers
diff mbox

Patch

diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index cc33260..65bb8f3 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -638,6 +638,10 @@  static void native_flush_hash_range(unsigned long number, int local)
 	unsigned long psize = batch->psize;
 	int ssize = batch->ssize;
 	int i;
+	unsigned int use_local;
+
+	use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) &&
+		mmu_psize_defs[psize].tlbiel && !cxl_ctx_in_use();
 
 	local_irq_save(flags);
 
@@ -667,8 +671,7 @@  static void native_flush_hash_range(unsigned long number, int local)
 		} pte_iterate_hashed_end();
 	}
 
-	if (mmu_has_feature(MMU_FTR_TLBIEL) &&
-	    mmu_psize_defs[psize].tlbiel && local) {
+	if (use_local) {
 		asm volatile("ptesync":::"memory");
 		for (i = 0; i < number; i++) {
 			vpn = batch->vpn[i];