@@ -38,6 +38,19 @@ void setup_iomux_uart(void)
}
/* MMC */
+static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
+ IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
static iomux_v3_cfg_t const usdhc3_pads[] = {
IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -352,6 +365,41 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
+static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
+ /* USB_HUBRST# */
+ IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+ /* PANLEDG# */
+ IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+ /* PANLEDR# */
+ IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+ /* MX6_LOCLED# */
+ IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+ /* IOEXP_PWREN# */
+ IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+ /* IOEXP_IRQ# */
+ IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+ /* DIOI2C_DIS# */
+ IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+ /* UART_RS485 */
+ IOMUX_PADS(PAD_DISP0_DAT2__GPIO4_IO23 | DIO_PAD_CFG),
+ /* UART_HALF */
+ IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | DIO_PAD_CFG),
+ /* SKT1_WDIS# */
+ IOMUX_PADS(PAD_DISP0_DAT17__GPIO5_IO11 | DIO_PAD_CFG),
+ /* SKT1_RST# */
+ IOMUX_PADS(PAD_DISP0_DAT18__GPIO5_IO12 | DIO_PAD_CFG),
+ /* SKT2_WDIS# */
+ IOMUX_PADS(PAD_DISP0_DAT19__GPIO5_IO13 | DIO_PAD_CFG),
+ /* SKT2_RST# */
+ IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+ /* M2_OFF# */
+ IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 | DIO_PAD_CFG),
+ /* M2_WDIS# */
+ IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
+ /* M2_RST# */
+ IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 | DIO_PAD_CFG),
+};
+
/* Digital I/O */
struct dio_cfg gw51xx_dio[] = {
{
@@ -566,6 +614,81 @@ struct dio_cfg gw553x_dio[] = {
},
};
+struct dio_cfg gw5904_dio[] = {
+ {
+ { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+ IMX_GPIO_NR(1, 16),
+ { 0, 0 },
+ 0
+ },
+ {
+ { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+ IMX_GPIO_NR(1, 19),
+ { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+ 2
+ },
+ {
+ { IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+ IMX_GPIO_NR(1, 17),
+ { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+ 3
+ },
+ {
+ {IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+ IMX_GPIO_NR(1, 20),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00) },
+ IMX_GPIO_NR(2, 0),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D1__GPIO2_IO01) },
+ IMX_GPIO_NR(2, 1),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02) },
+ IMX_GPIO_NR(2, 2),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03) },
+ IMX_GPIO_NR(2, 3),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04) },
+ IMX_GPIO_NR(2, 4),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D5__GPIO2_IO05) },
+ IMX_GPIO_NR(2, 5),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06) },
+ IMX_GPIO_NR(2, 6),
+ { 0, 0 },
+ 0
+ },
+ {
+ {IOMUX_PADS(PAD_NANDF_D7__GPIO2_IO07) },
+ IMX_GPIO_NR(2, 7),
+ { 0, 0 },
+ 0
+ },
+};
+
/*
* Board Specific GPIO
*/
@@ -588,6 +711,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.dioi2c_en = IMX_GPIO_NR(4, 5),
.pcie_sson = IMX_GPIO_NR(1, 20),
.otgpwr_en = IMX_GPIO_NR(3, 22),
+ .mmc_cd = IMX_GPIO_NR(7, 0),
},
/* GW51xx */
@@ -631,6 +755,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.rs232_en = GP_RS232_EN,
.otgpwr_en = IMX_GPIO_NR(3, 22),
.vsel_pin = IMX_GPIO_NR(6, 14),
+ .mmc_cd = IMX_GPIO_NR(7, 0),
},
/* GW53xx */
@@ -654,6 +779,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.rs232_en = GP_RS232_EN,
.otgpwr_en = IMX_GPIO_NR(3, 22),
.vsel_pin = IMX_GPIO_NR(6, 14),
+ .mmc_cd = IMX_GPIO_NR(7, 0),
},
/* GW54xx */
@@ -679,6 +805,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.rs232_en = GP_RS232_EN,
.otgpwr_en = IMX_GPIO_NR(3, 22),
.vsel_pin = IMX_GPIO_NR(6, 14),
+ .mmc_cd = IMX_GPIO_NR(7, 0),
},
/* GW551x */
@@ -726,6 +853,24 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
.wdis = IMX_GPIO_NR(7, 12),
.otgpwr_en = IMX_GPIO_NR(3, 22),
.vsel_pin = IMX_GPIO_NR(6, 14),
+ .mmc_cd = IMX_GPIO_NR(7, 0),
+ },
+
+ /* GW5904 */
+ {
+ .gpio_pads = gw5904_gpio_pads,
+ .num_pads = ARRAY_SIZE(gw5904_gpio_pads)/2,
+ .dio_cfg = gw5904_dio,
+ .dio_num = ARRAY_SIZE(gw5904_dio),
+ .leds = {
+ IMX_GPIO_NR(4, 6),
+ IMX_GPIO_NR(4, 7),
+ IMX_GPIO_NR(4, 15),
+ },
+ .pcie_rst = IMX_GPIO_NR(1, 0),
+ .mezz_pwren = IMX_GPIO_NR(2, 19),
+ .mezz_irq = IMX_GPIO_NR(2, 18),
+ .otgpwr_en = IMX_GPIO_NR(3, 22),
},
};
@@ -834,6 +979,30 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
gpio_direction_input(gpio_cfg[board].vsel_pin);
gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
}
+
+ /* microSD CD */
+ if (gpio_cfg[board].mmc_cd) {
+ gpio_request(gpio_cfg[board].mmc_cd, "sd_cd");
+ gpio_direction_input(gpio_cfg[board].mmc_cd);
+ }
+
+ /* Anything else board specific */
+ switch(board) {
+ case GW5904:
+ gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
+ gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
+ gpio_request(IMX_GPIO_NR(5, 12), "skt1_rst#");
+ gpio_direction_output(IMX_GPIO_NR(5, 12), 1);
+ gpio_request(IMX_GPIO_NR(5, 13), "skt2_wdis#");
+ gpio_direction_output(IMX_GPIO_NR(5, 13), 1);
+ gpio_request(IMX_GPIO_NR(1, 15), "m2_off#");
+ gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
+ gpio_request(IMX_GPIO_NR(1, 14), "m2_wdis#");
+ gpio_direction_output(IMX_GPIO_NR(1, 14), 1);
+ gpio_request(IMX_GPIO_NR(1, 13), "m2_rst#");
+ gpio_direction_output(IMX_GPIO_NR(1, 13), 1);
+ break;
+ }
}
/* setup GPIO pinmux and default configuration per baseboard and env */
@@ -995,19 +1164,56 @@ static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
int board_mmc_init(bd_t *bis)
{
- /* Only one USDHC controller on Ventana */
- SETUP_IOMUX_PADS(usdhc3_pads);
- usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- usdhc_cfg.max_bus_width = 4;
-
- return fsl_esdhc_initialize(bis, &usdhc_cfg);
+ struct ventana_board_info ventana_info;
+ int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+ int ret;
+
+ switch (board_type) {
+ case GW52xx:
+ case GW53xx:
+ case GW54xx:
+ case GW553x:
+ /* usdhc3: 4bit microSD */
+ SETUP_IOMUX_PADS(usdhc3_pads);
+ usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+ usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg.max_bus_width = 4;
+ return fsl_esdhc_initialize(bis, &usdhc_cfg);
+ case GW5904:
+ /* usdhc3: 8bit eMMC */
+ SETUP_IOMUX_PADS(gw5904_emmc_pads);
+ usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+ usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg.max_bus_width = 8;
+ return fsl_esdhc_initialize(bis, &usdhc_cfg);
+ default:
+ /* doesn't have MMC */
+ return -1;
+ }
}
int board_mmc_getcd(struct mmc *mmc)
{
+ struct ventana_board_info ventana_info;
+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+ int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+ int gpio = gpio_cfg[board].mmc_cd;
+
/* Card Detect */
- gpio_request(GP_SD3_CD, "sd_cd");
- gpio_direction_input(GP_SD3_CD);
- return !gpio_get_value(GP_SD3_CD);
+ switch (board) {
+ case GW5904:
+ /* emmc is always present */
+ if (cfg->esdhc_base == USDHC3_BASE_ADDR)
+ return 1;
+ break;
+ }
+
+ if (gpio) {
+ debug("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio));
+ return !gpio_get_value(gpio);
+ }
+
+ return -1;
}
+
#endif /* CONFIG_FSL_ESDHC */
@@ -13,7 +13,6 @@
/* GPIO's common to all baseboards */
#define GP_PHY_RST IMX_GPIO_NR(1, 30)
-#define GP_SD3_CD IMX_GPIO_NR(7, 0)
#define GP_RS232_EN IMX_GPIO_NR(2, 11)
#define GP_MSATA_SEL IMX_GPIO_NR(2, 8)
@@ -79,6 +78,7 @@ struct ventana {
int rs232_en;
int otgpwr_en;
int vsel_pin;
+ int mmc_cd;
/* various features */
bool usd_vsel;
};
@@ -64,6 +64,7 @@ read_eeprom(int bus, struct ventana_board_info *info)
if (strncasecmp((const char *)info->model, "GW5400-A", 8) == 0)
baseboard = '0';
+ type = GW_UNKNOWN;
switch (baseboard) {
case '0': /* original GW5400-A prototype */
type = GW54proto;
@@ -91,10 +92,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
type = GW553x;
break;
}
- /* fall through */
- default:
- printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
- type = GW_UNKNOWN;
+ break;
+ case '9':
+ if (info->model[4] == '0' && info->model[5] == '4')
+ type = GW5904;
break;
}
return type;
@@ -132,8 +132,9 @@ static void setup_iomux_enet(int gpio)
/* toggle PHY_RST# */
gpio_request(gpio, "phy_rst#");
gpio_direction_output(gpio, 0);
- mdelay(2);
+ mdelay(10);
gpio_set_value(gpio, 1);
+ mdelay(100);
}
#ifdef CONFIG_USB_EHCI_MX6
@@ -232,6 +233,38 @@ int board_phy_config(struct phy_device *phydev)
return 0;
}
+#ifdef CONFIG_MV88E61XX_SWITCH
+int mv88e61xx_hw_reset(struct phy_device *phydev)
+{
+ struct mii_dev *bus = phydev->bus;
+
+ /* GPIO[0] output, CLK125 */
+ debug("enabling RGMII_REFCLK\n");
+ bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+ 0x1a /*MV_SCRATCH_MISC*/,
+ (1 << 15) | (0x62 /*MV_GPIO_DIR*/ << 8) | 0xfe);
+ bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+ 0x1a /*MV_SCRATCH_MISC*/,
+ (1 << 15) | (0x68 /*MV_GPIO01_CNTL*/ << 8) | 7);
+
+ /* RGMII delay - Physical Control register bit[15:14] */
+ debug("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT);
+ /* forced 1000mbps full-duplex link */
+ bus->write(bus, 0x10 + CONFIG_MV88E61XX_CPU_PORT, 0, 1, 0xc0fe);
+ phydev->autoneg = AUTONEG_DISABLE;
+ phydev->speed = SPEED_1000;
+ phydev->duplex = DUPLEX_FULL;
+
+ /* LED configuration: 7:4-green (8=Activity) 3:0 amber (9=10Link) */
+ bus->write(bus, 0x10, 0, 0x16, 0x8089);
+ bus->write(bus, 0x11, 0, 0x16, 0x8089);
+ bus->write(bus, 0x12, 0, 0x16, 0x8089);
+ bus->write(bus, 0x13, 0, 0x16, 0x8089);
+
+ return 0;
+}
+#endif // CONFIG_MV88E61XX_SWITCH
+
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_FEC_MXC
@@ -608,6 +608,20 @@ void board_init_f(ulong dummy)
memset(__bss_start, 0, __bss_end - __bss_start);
}
+void board_boot_order(u32 *spl_boot_list)
+{
+ spl_boot_list[0] = spl_boot_device();
+ switch (spl_boot_list[0]) {
+ case BOOT_DEVICE_NAND:
+ spl_boot_list[1] = BOOT_DEVICE_MMC1;
+ spl_boot_list[2] = BOOT_DEVICE_UART;
+ break;
+ case BOOT_DEVICE_MMC1:
+ spl_boot_list[1] = BOOT_DEVICE_UART;
+ break;
+ }
+}
+
/* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
/* its our chance to print info about boot device */
void spl_board_init(void)
@@ -112,6 +112,7 @@ enum {
GW551x,
GW552x,
GW553x,
+ GW5904,
GW_UNKNOWN,
GW_BADCRC,
};
@@ -45,6 +45,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_DM=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
new file mode 100644
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Ventana > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_DM=y
+CONFIG_PHYLIB=y
+CONFIG_MV88E61XX_SWITCH=y
+CONFIG_MV88E61XX_CPU_PORT=5
+CONFIG_MV88E61XX_PHY_PORTS=0xf
+CONFIG_MV88E61XX_FIXED_PORTS=0x0
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Gateworks"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
@@ -46,6 +46,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
CONFIG_DM=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
@@ -152,7 +152,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
#define CONFIG_ARP_TIMEOUT 200UL
/* USB Configs */