diff mbox

[U-Boot,v2] armv8: fsl-lsch2: add workaround for erratum A-010635

Message ID 1486448354-47942-1-git-send-email-yuantian.tang@nxp.com
State Not Applicable
Delegated to: York Sun
Headers show

Commit Message

tang yuantian Feb. 7, 2017, 6:19 a.m. UTC 
From: Tang Yuantian <Yuantian.Tang@nxp.com>

Read DMA operations causes CRC error on armv8 chassis 2 platforms
due to the erratum A-010635.
In order to support sata on these platforms, ECC needs to be disabled. 

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
---
v2:
  - refine the commit message

 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 --
 1 file changed, 2 deletions(-)

Comments

tang yuantian Feb. 7, 2017, 6:34 a.m. UTC | #1 
Oops, sent this patch twice, please ignore this one.

Regards,
Yuantian

> -----Original Message-----
> From: yuantian.tang@nxp.com [mailto:yuantian.tang@nxp.com]
> Sent: Tuesday, February 07, 2017 2:19 PM
> To: york sun <york.sun@nxp.com>
> Cc: u-boot@lists.denx.de; Y.T. Tang <yuantian.tang@nxp.com>; Y.T. Tang
> <yuantian.tang@nxp.com>
> Subject: [PATCH v2] armv8: fsl-lsch2: add workaround for erratum A-010635
> 
> From: Tang Yuantian <Yuantian.Tang@nxp.com>
> 
> Read DMA operations causes CRC error on armv8 chassis 2 platforms due to
> the erratum A-010635.
> In order to support sata on these platforms, ECC needs to be disabled.
> 
> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
> ---
> v2:
>   - refine the commit message
> 
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 9489f85..b54a937 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -233,10 +233,8 @@ int sata_init(void)  {
>  	struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
> 
> -#ifdef CONFIG_ARCH_LS1046A
>  	/* Disable SATA ECC */
>  	out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520,
> 0x80000000); -#endif
>  	out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
>  	out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
>  	out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);
> --
> 2.1.0.27.g96db324
diff mbox

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 9489f85..b54a937 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -233,10 +233,8 @@  int sata_init(void)
 {
 	struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
 
-#ifdef CONFIG_ARCH_LS1046A
 	/* Disable SATA ECC */
 	out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000);
-#endif
 	out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
 	out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
 	out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);