| Message ID | 1485310967-3837-5-git-send-email-andre.przywara@arm.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On Wed, Jan 25, 2017 at 02:22:38AM +0000, Andre Przywara wrote: > Instead of enumerating all SoC families that need that bit set, let's > just express this more clearly: The SMP bits needs to be set on > SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the > other way round, so we use ! CPU_IS_UP and ! ARM64. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > --- > arch/arm/mach-sunxi/board.c | 5 +---- > board/sunxi/Kconfig | 6 ++++++ That should probably be part of arch/arm/Kconfig. Once moved there, Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Thanks, Maxime > 2 files changed, 7 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > index 58fbacb..fdcf68e 100644 > --- a/arch/arm/mach-sunxi/board.c > +++ b/arch/arm/mach-sunxi/board.c > @@ -180,10 +180,7 @@ void s_init(void) > /* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */ > #endif > > -#if defined CONFIG_MACH_SUN6I || \ > - defined CONFIG_MACH_SUN7I || \ > - defined CONFIG_MACH_SUN8I || \ > - defined CONFIG_MACH_SUN9I > +#if !defined(CONFIG_ARM_CORTEX_CPU_IS_UP) && !defined(CONFIG_ARM64) > /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ > asm volatile( > "mrc p15, 0, r0, c1, c0, 1\n" > diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig > index 37b4252..e795f12 100644 > --- a/board/sunxi/Kconfig > +++ b/board/sunxi/Kconfig > @@ -27,6 +27,10 @@ config SPL_POWER_SUPPORT > config SPL_SERIAL_SUPPORT > default y > > +config ARM_CORTEX_CPU_IS_UP > + bool > + default n > + > # Note only one of these may be selected at a time! But hidden choices are > # not supported by Kconfig > config SUNXI_GEN_SUN4I > @@ -50,12 +54,14 @@ choice > config MACH_SUN4I > bool "sun4i (Allwinner A10)" > select CPU_V7 > + select ARM_CORTEX_CPU_IS_UP > select SUNXI_GEN_SUN4I > select SUPPORT_SPL > > config MACH_SUN5I > bool "sun5i (Allwinner A13)" > select CPU_V7 > + select ARM_CORTEX_CPU_IS_UP > select SUNXI_GEN_SUN4I > select SUPPORT_SPL > > -- > 2.8.2 >
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 58fbacb..fdcf68e 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -180,10 +180,7 @@ void s_init(void) /* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */ #endif -#if defined CONFIG_MACH_SUN6I || \ - defined CONFIG_MACH_SUN7I || \ - defined CONFIG_MACH_SUN8I || \ - defined CONFIG_MACH_SUN9I +#if !defined(CONFIG_ARM_CORTEX_CPU_IS_UP) && !defined(CONFIG_ARM64) /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 37b4252..e795f12 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -27,6 +27,10 @@ config SPL_POWER_SUPPORT config SPL_SERIAL_SUPPORT default y +config ARM_CORTEX_CPU_IS_UP + bool + default n + # Note only one of these may be selected at a time! But hidden choices are # not supported by Kconfig config SUNXI_GEN_SUN4I @@ -50,12 +54,14 @@ choice config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL config MACH_SUN5I bool "sun5i (Allwinner A13)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL
Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/mach-sunxi/board.c | 5 +---- board/sunxi/Kconfig | 6 ++++++ 2 files changed, 7 insertions(+), 4 deletions(-)