| Message ID | 1480424316-22201-11-git-send-email-phil.edworthy@renesas.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On Tue, Nov 29, 2016 at 6:28 PM, Phil Edworthy
<phil.edworthy@renesas.com> wrote:
> This is in preparation for adding another arg.
?? proper reason for changing arg to bool.
thanks!
Hi Jagan, On 02 December 2016 14:20, Jagan Teki wrote: > On Tue, Nov 29, 2016 at 6:28 PM, Phil Edworthy > <phil.edworthy@renesas.com> wrote: > > This is in preparation for adding another arg. > > ?? proper reason for changing arg to bool. Purely because the patch 11 adds another arg that is a bool (which is the natural type as it is read from a dtb). Then having this bypass arg as something other than a bool look a bit odd. Thanks Phil
On Mon, Dec 5, 2016 at 11:07 AM, Phil Edworthy <phil.edworthy@renesas.com> wrote: > Hi Jagan, > > On 02 December 2016 14:20, Jagan Teki wrote: >> On Tue, Nov 29, 2016 at 6:28 PM, Phil Edworthy >> <phil.edworthy@renesas.com> wrote: >> > This is in preparation for adding another arg. >> >> ?? proper reason for changing arg to bool. > Purely because the patch 11 adds another arg that is a bool (which is the natural > type as it is read from a dtb). Then having this bypass arg as something other > than a bool look a bit odd. Can't we make this as 11 and saying the reason for bool which is used/compatible with previous dt patch (I mean 11th patch in the current case)? thanks!
Hi Jagan, On 05 December 2016 10:29, Jagan Teki wrote: > On Mon, Dec 5, 2016 at 11:07 AM, Phil Edworthy > <phil.edworthy@renesas.com> wrote: > > Hi Jagan, > > > > On 02 December 2016 14:20, Jagan Teki wrote: > >> On Tue, Nov 29, 2016 at 6:28 PM, Phil Edworthy > >> <phil.edworthy@renesas.com> wrote: > >> > This is in preparation for adding another arg. > >> > >> ?? proper reason for changing arg to bool. > > Purely because the patch 11 adds another arg that is a bool (which is the natural > > type as it is read from a dtb). Then having this bypass arg as something other > > than a bool look a bit odd. > > Can't we make this as 11 and saying the reason for bool which is > used/compatible with previous dt patch (I mean 11th patch in the > current case)? Do you mean swap patches 10 and 11? Then this commit msg is basically to say it is changed to bool to match the other arg? If so, then sure, no problem. Thanks Phil > thanks! > -- > Jagan Teki > Free Software Engineer | www.openedev.com > U-Boot, Linux | Upstream Maintainer > Hyderabad, India.
On 12/05/2016 11:33 AM, Phil Edworthy wrote: > Hi Jagan, > > On 05 December 2016 10:29, Jagan Teki wrote: >> On Mon, Dec 5, 2016 at 11:07 AM, Phil Edworthy >> <phil.edworthy@renesas.com> wrote: >>> Hi Jagan, >>> >>> On 02 December 2016 14:20, Jagan Teki wrote: >>>> On Tue, Nov 29, 2016 at 6:28 PM, Phil Edworthy >>>> <phil.edworthy@renesas.com> wrote: >>>>> This is in preparation for adding another arg. >>>> >>>> ?? proper reason for changing arg to bool. >>> Purely because the patch 11 adds another arg that is a bool (which is the natural >>> type as it is read from a dtb). Then having this bypass arg as something other >>> than a bool look a bit odd. >> >> Can't we make this as 11 and saying the reason for bool which is >> used/compatible with previous dt patch (I mean 11th patch in the >> current case)? > Do you mean swap patches 10 and 11? Then this commit msg is basically > to say it is changed to bool to match the other arg? > If so, then sure, no problem. I don't think it makes any sense to swap patches 10 and 11, they seem orthogonal to me.
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index f16f90d..1c4ed33 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -49,7 +49,7 @@ static int spi_calibration(struct udevice *bus, uint hz) cadence_spi_write_speed(bus, 1000000); /* configure the read data capture delay register to 0 */ - cadence_qspi_apb_readdata_capture(base, 1, 0); + cadence_qspi_apb_readdata_capture(base, true, 0); /* Enable QSPI */ cadence_qspi_apb_controller_enable(base); @@ -69,7 +69,7 @@ static int spi_calibration(struct udevice *bus, uint hz) cadence_qspi_apb_controller_disable(base); /* reconfigure the read data capture delay register */ - cadence_qspi_apb_readdata_capture(base, 1, i); + cadence_qspi_apb_readdata_capture(base, true, i); /* Enable back QSPI */ cadence_qspi_apb_controller_enable(base); @@ -105,7 +105,8 @@ static int spi_calibration(struct udevice *bus, uint hz) cadence_qspi_apb_controller_disable(base); /* configure the final value for read data capture delay register */ - cadence_qspi_apb_readdata_capture(base, 1, (range_hi + range_lo) / 2); + cadence_qspi_apb_readdata_capture(base, true, + (range_hi + range_lo) / 2); debug("SF: Read data capture delay calibrated to %i (%i - %i)\n", (range_hi + range_lo) / 2, range_lo, range_hi); diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index d1927a4..50c6e7c 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -72,6 +72,6 @@ void cadence_qspi_apb_delay(void *reg_base, unsigned int tchsh_ns, unsigned int tslch_ns); void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy); void cadence_qspi_apb_readdata_capture(void *reg_base, - unsigned int bypass, unsigned int delay); + bool bypass, unsigned int delay); #endif /* __CADENCE_QSPI_H__ */ diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index df6a91f..f2cd852 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -234,7 +234,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base) } void cadence_qspi_apb_readdata_capture(void *reg_base, - unsigned int bypass, unsigned int delay) + bool bypass, unsigned int delay) { unsigned int reg; cadence_qspi_apb_controller_disable(reg_base);
This is in preparation for adding another arg. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> --- v3: - New patch to split changes. --- drivers/spi/cadence_qspi.c | 7 ++++--- drivers/spi/cadence_qspi.h | 2 +- drivers/spi/cadence_qspi_apb.c | 2 +- 3 files changed, 6 insertions(+), 5 deletions(-)