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[U-Boot,v3,4/9] ARM: stm32: fix stm32f7 sdram fmc base address

Message ID 1480014647-44263-5-git-send-email-michi.kurz@gmail.com
State Accepted
Commit dd3f0ebfb78f007c9fae38d9c20e58b9cbd6b3ce
Delegated to: Tom Rini
Headers show

Commit Message

Michael Kurz Nov. 24, 2016, 7:10 p.m. UTC
Fix base address of fmc sdram controller.
The base address is defined twice, once in fmc.h and once in stm32.h.
Fix wrong definition in stm32.h.
Remove the definiton in fmc.h and use the definition in stm32.h

Signed-off-by: Michael Kurz <michi.kurz@gmail.com>

Series-changes 3:
- Split cleanup patch

---

Changes in v3: None
Changes in v2: None

 arch/arm/include/asm/arch-stm32f7/fmc.h   | 3 +--
 arch/arm/include/asm/arch-stm32f7/stm32.h | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

Comments

Vikas MANOCHA Dec. 1, 2016, 6:23 p.m. UTC | #1
Hi,

On 11/24/2016 11:10 AM, Michael Kurz wrote:
> Fix base address of fmc sdram controller.
> The base address is defined twice, once in fmc.h and once in stm32.h.
> Fix wrong definition in stm32.h.
> Remove the definiton in fmc.h and use the definition in stm32.h
> 
> Signed-off-by: Michael Kurz <michi.kurz@gmail.com>

Nitpicking...re-word the commit message, it seems repeating itself in 2nd & 4th line.
Otherwise,  Acked-by: Vikas Manocha <vikas.manocha@st.com>

Cheers,
Vikas

> 
> Series-changes 3:
> - Split cleanup patch
> 
> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/include/asm/arch-stm32f7/fmc.h   | 3 +--
>  arch/arm/include/asm/arch-stm32f7/stm32.h | 2 +-
>  2 files changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-stm32f7/fmc.h b/arch/arm/include/asm/arch-stm32f7/fmc.h
> index d61a86f..4741e5a 100644
> --- a/arch/arm/include/asm/arch-stm32f7/fmc.h
> +++ b/arch/arm/include/asm/arch-stm32f7/fmc.h
> @@ -24,8 +24,7 @@ struct stm32_fmc_regs {
>  /*
>   * FMC registers base
>   */
> -#define STM32_SDRAM_FMC_BASE	0xA0000140
> -#define STM32_SDRAM_FMC		((struct stm32_fmc_regs *)STM32_SDRAM_FMC_BASE)
> +#define STM32_SDRAM_FMC		((struct stm32_fmc_regs *)SDRAM_FMC_BASE)
>  
>  /* Control register SDCR */
>  #define FMC_SDCR_RPIPE_SHIFT	13	/* RPIPE bit shift */
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
> index 3a4ae89..92a868f 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
> @@ -49,7 +49,7 @@
>  #define FLASH_CNTL_BASE		(AHB1_PERIPH_BASE + 0x3C00)
>  
>  
> -#define SDRAM_FMC_BASE		(AHB3_PERIPH_BASE + 0x4A0000140)
> +#define SDRAM_FMC_BASE		(AHB3_PERIPH_BASE + 0x40000140)
>  
>  static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>  	[0 ... 3] =	32 * 1024,
>
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-stm32f7/fmc.h b/arch/arm/include/asm/arch-stm32f7/fmc.h
index d61a86f..4741e5a 100644
--- a/arch/arm/include/asm/arch-stm32f7/fmc.h
+++ b/arch/arm/include/asm/arch-stm32f7/fmc.h
@@ -24,8 +24,7 @@  struct stm32_fmc_regs {
 /*
  * FMC registers base
  */
-#define STM32_SDRAM_FMC_BASE	0xA0000140
-#define STM32_SDRAM_FMC		((struct stm32_fmc_regs *)STM32_SDRAM_FMC_BASE)
+#define STM32_SDRAM_FMC		((struct stm32_fmc_regs *)SDRAM_FMC_BASE)
 
 /* Control register SDCR */
 #define FMC_SDCR_RPIPE_SHIFT	13	/* RPIPE bit shift */
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
index 3a4ae89..92a868f 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -49,7 +49,7 @@ 
 #define FLASH_CNTL_BASE		(AHB1_PERIPH_BASE + 0x3C00)
 
 
-#define SDRAM_FMC_BASE		(AHB3_PERIPH_BASE + 0x4A0000140)
+#define SDRAM_FMC_BASE		(AHB3_PERIPH_BASE + 0x40000140)
 
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 	[0 ... 3] =	32 * 1024,