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[5/5] Fix typo in arm_cpu_do_interrupt_aarch32.

Message ID 1478208419-39125-1-git-send-email-julian@codesourcery.com
State New
Headers show

Commit Message

Julian Brown Nov. 3, 2016, 9:26 p.m. UTC
This appears to be a typo in arm_cpu_do_interrupt_aarch32 (OR'ing with ~CPSR_E
instead of CPSR_E).

Signed-off-by: Julian Brown <julian@codesourcery.com>
---
 target-arm/helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Peter Maydell Nov. 4, 2016, 1:02 p.m. UTC | #1
On 3 November 2016 at 21:26, Julian Brown <julian@codesourcery.com> wrote:
> This appears to be a typo in arm_cpu_do_interrupt_aarch32 (OR'ing with ~CPSR_E
> instead of CPSR_E).
>
> Signed-off-by: Julian Brown <julian@codesourcery.com>
> ---
>  target-arm/helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 25b15dc..b5b65ca 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -6438,7 +6438,7 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
>      /* Set new mode endianness */
>      env->uncached_cpsr &= ~CPSR_E;
>      if (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE) {
> -        env->uncached_cpsr |= ~CPSR_E;
> +        env->uncached_cpsr |= CPSR_E;
>      }
>      env->daif |= mask;
>      /* this is a lie, as the was no c1_sys on V4T/V5, but who cares
> --
> 1.9.1

This is an obvious bugfix so I've applied it to target-arm.next
for 2.8. I tweaked the commit message a bit to say what the
effects of the bug were.

thanks
-- PMM
diff mbox

Patch

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 25b15dc..b5b65ca 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6438,7 +6438,7 @@  static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
     /* Set new mode endianness */
     env->uncached_cpsr &= ~CPSR_E;
     if (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE) {
-        env->uncached_cpsr |= ~CPSR_E;
+        env->uncached_cpsr |= CPSR_E;
     }
     env->daif |= mask;
     /* this is a lie, as the was no c1_sys on V4T/V5, but who cares