| Message ID | 1474968546-8285-6-git-send-email-hongbo.zhang@nxp.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Tom Rini |
| Headers | show |
This patch should be move before adding or setting up PSCI, because if PSCI is ready without SMC enabled, kernel detects PSCI exist from DT, then it issues SMC call for psci_version(), this causes instruction not defined exception. Will update this in next iteration, and welcome any review comments, thanks. On Tue, Sep 27, 2016 at 5:29 PM, <macro.wave.z@gmail.com> wrote: > From: Hongbo Zhang <hongbo.zhang@nxp.com> > > PSCI implementation needs the SMC instruction to be enabled. > Following the legacy codes pattern, no bit macro definition and bit operation > are used, only the immediate data used in line is changed. > > Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> > --- > arch/arm/include/asm/macro.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h > index 9bb0efa..35ea002 100644 > --- a/arch/arm/include/asm/macro.h > +++ b/arch/arm/include/asm/macro.h > @@ -137,7 +137,7 @@ lr .req x30 > > .macro armv8_switch_to_el2_m, xreg1 > /* 64bit EL2 | HCE | SMD | RES1 (Bits[5:4]) | Non-secure EL0/EL1 */ > - mov \xreg1, #0x5b1 > + mov \xreg1, #0x531 > msr scr_el3, \xreg1 > msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ > mov \xreg1, #0x33ff > -- > 2.1.4 >
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 9bb0efa..35ea002 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -137,7 +137,7 @@ lr .req x30 .macro armv8_switch_to_el2_m, xreg1 /* 64bit EL2 | HCE | SMD | RES1 (Bits[5:4]) | Non-secure EL0/EL1 */ - mov \xreg1, #0x5b1 + mov \xreg1, #0x531 msr scr_el3, \xreg1 msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ mov \xreg1, #0x33ff