Message ID | 1463388271-24239-1-git-send-email-colin.king@canonical.com |
---|---|
State | Accepted |
Headers | show |
On 05/16/2016 04:44 PM, Colin King wrote: > From: Colin Ian King <colin.king@canonical.com> > > We should not checking consistency across CPUs for the SYSENTER_* > MSRs, so disable these. > > Kudos to Rudolf Marek for spotting this > > Signed-off-by: Colin Ian King <colin.king@canonical.com> > --- > src/cpu/msr/msr.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c > index 6e9842b..913f5ab 100644 > --- a/src/cpu/msr/msr.c > +++ b/src/cpu/msr/msr.c > @@ -253,9 +253,14 @@ typedef struct { > /* From AMD Architecture Programmer's Manual, Volume 2: System Programming, Appending A */ > static const msr_info AMD_MSRs[] = { > { "MTRRCAP", 0x000000fe, 0x0000000000000fffULL, NULL }, > + /* > + * LP#1582005 - Do not check sysenter MSRs, they will be different on > + * each CPU, so checking them across CPUs is incorrect > + * > { "SYSENTER_CS", 0x00000174, 0x000000000000ffffULL, NULL }, > { "SYSENTER_ESP", 0x00000175, 0xffffffffffffffffULL, NULL }, > { "SYSENTER_EIP", 0x00000176, 0xffffffffffffffffULL, NULL }, > + */ > { "MCG_CAP", 0x00000179, 0x0000000001ff0fffULL, NULL }, > { "MCG_STATUS", 0x0000017a, 0xffffffffffffffffULL, NULL }, > { "MCG_CTL", 0x0000017b, 0xffffffffffffffffULL, NULL }, > Acked-by: Alex Hung <alex.hung@canonical.com>
On 05/16/2016 04:44 PM, Colin King wrote: > From: Colin Ian King <colin.king@canonical.com> > > We should not checking consistency across CPUs for the SYSENTER_* > MSRs, so disable these. > > Kudos to Rudolf Marek for spotting this > > Signed-off-by: Colin Ian King <colin.king@canonical.com> > --- > src/cpu/msr/msr.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c > index 6e9842b..913f5ab 100644 > --- a/src/cpu/msr/msr.c > +++ b/src/cpu/msr/msr.c > @@ -253,9 +253,14 @@ typedef struct { > /* From AMD Architecture Programmer's Manual, Volume 2: System Programming, Appending A */ > static const msr_info AMD_MSRs[] = { > { "MTRRCAP", 0x000000fe, 0x0000000000000fffULL, NULL }, > + /* > + * LP#1582005 - Do not check sysenter MSRs, they will be different on > + * each CPU, so checking them across CPUs is incorrect > + * > { "SYSENTER_CS", 0x00000174, 0x000000000000ffffULL, NULL }, > { "SYSENTER_ESP", 0x00000175, 0xffffffffffffffffULL, NULL }, > { "SYSENTER_EIP", 0x00000176, 0xffffffffffffffffULL, NULL }, > + */ > { "MCG_CAP", 0x00000179, 0x0000000001ff0fffULL, NULL }, > { "MCG_STATUS", 0x0000017a, 0xffffffffffffffffULL, NULL }, > { "MCG_CTL", 0x0000017b, 0xffffffffffffffffULL, NULL }, Acked-by: Ivan Hu <ivan.hu@canonical.com>
diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c index 6e9842b..913f5ab 100644 --- a/src/cpu/msr/msr.c +++ b/src/cpu/msr/msr.c @@ -253,9 +253,14 @@ typedef struct { /* From AMD Architecture Programmer's Manual, Volume 2: System Programming, Appending A */ static const msr_info AMD_MSRs[] = { { "MTRRCAP", 0x000000fe, 0x0000000000000fffULL, NULL }, + /* + * LP#1582005 - Do not check sysenter MSRs, they will be different on + * each CPU, so checking them across CPUs is incorrect + * { "SYSENTER_CS", 0x00000174, 0x000000000000ffffULL, NULL }, { "SYSENTER_ESP", 0x00000175, 0xffffffffffffffffULL, NULL }, { "SYSENTER_EIP", 0x00000176, 0xffffffffffffffffULL, NULL }, + */ { "MCG_CAP", 0x00000179, 0x0000000001ff0fffULL, NULL }, { "MCG_STATUS", 0x0000017a, 0xffffffffffffffffULL, NULL }, { "MCG_CTL", 0x0000017b, 0xffffffffffffffffULL, NULL },