From patchwork Mon May 16 08:44:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Colin Ian King X-Patchwork-Id: 622506 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) by ozlabs.org (Postfix) with ESMTP id 3r7YtL2tyLz9sdn; Mon, 16 May 2016 18:44:42 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1b2E8m-0000yW-NN; Mon, 16 May 2016 08:44:40 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1b2E8e-0000xo-2f for fwts-devel@lists.ubuntu.com; Mon, 16 May 2016 08:44:32 +0000 Received: from 1.general.cking.uk.vpn ([10.172.193.212] helo=localhost) by youngberry.canonical.com with esmtpsa (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1b2E8d-0001Yc-MR; Mon, 16 May 2016 08:44:31 +0000 From: Colin King To: fwts-devel@lists.ubuntu.com Subject: [PATCH] cpu: msr: do not check SYSENTER_* MSRs (LP: #1582005) Date: Mon, 16 May 2016 09:44:31 +0100 Message-Id: <1463388271-24239-1-git-send-email-colin.king@canonical.com> X-Mailer: git-send-email 2.8.1 X-BeenThere: fwts-devel@lists.ubuntu.com X-Mailman-Version: 2.1.14 Precedence: list List-Id: Firmware Test Suite Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: fwts-devel-bounces@lists.ubuntu.com Sender: fwts-devel-bounces@lists.ubuntu.com From: Colin Ian King We should not checking consistency across CPUs for the SYSENTER_* MSRs, so disable these. Kudos to Rudolf Marek for spotting this Signed-off-by: Colin Ian King Acked-by: Alex Hung Acked-by: Ivan Hu --- src/cpu/msr/msr.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c index 6e9842b..913f5ab 100644 --- a/src/cpu/msr/msr.c +++ b/src/cpu/msr/msr.c @@ -253,9 +253,14 @@ typedef struct { /* From AMD Architecture Programmer's Manual, Volume 2: System Programming, Appending A */ static const msr_info AMD_MSRs[] = { { "MTRRCAP", 0x000000fe, 0x0000000000000fffULL, NULL }, + /* + * LP#1582005 - Do not check sysenter MSRs, they will be different on + * each CPU, so checking them across CPUs is incorrect + * { "SYSENTER_CS", 0x00000174, 0x000000000000ffffULL, NULL }, { "SYSENTER_ESP", 0x00000175, 0xffffffffffffffffULL, NULL }, { "SYSENTER_EIP", 0x00000176, 0xffffffffffffffffULL, NULL }, + */ { "MCG_CAP", 0x00000179, 0x0000000001ff0fffULL, NULL }, { "MCG_STATUS", 0x0000017a, 0xffffffffffffffffULL, NULL }, { "MCG_CTL", 0x0000017b, 0xffffffffffffffffULL, NULL },