diff mbox

[U-Boot,4/8] mips: ath79: Add support for ungating USB on ar933x and ar934x

Message ID 1462472097-6407-4-git-send-email-marex@denx.de
State Superseded
Delegated to: Daniel Schwierzeck
Headers show

Commit Message

Marek Vasut May 5, 2016, 6:14 p.m. UTC
Add code to ungate the USB controller on ar933x and ar934x .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
---
 arch/mips/mach-ath79/include/mach/ath79.h |  2 +
 arch/mips/mach-ath79/reset.c              | 61 +++++++++++++++++++++++++++++++
 2 files changed, 63 insertions(+)

Comments

Daniel Schwierzeck May 6, 2016, 11:34 a.m. UTC | #1
Am 05.05.2016 um 20:14 schrieb Marek Vasut:
> Add code to ungate the USB controller on ar933x and ar934x .
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> Cc: Wills Wang <wills.wang@live.com>
> ---
>  arch/mips/mach-ath79/include/mach/ath79.h |  2 +
>  arch/mips/mach-ath79/reset.c              | 61 +++++++++++++++++++++++++++++++
>  2 files changed, 63 insertions(+)
> 

there are checkpatch.pl warnings:

warning: arch/mips/mach-ath79/reset.c,112: line over 80 characters

> diff --git a/arch/mips/mach-ath79/include/mach/ath79.h b/arch/mips/mach-ath79/include/mach/ath79.h
> index 90d80b8..682b6a2 100644
> --- a/arch/mips/mach-ath79/include/mach/ath79.h
> +++ b/arch/mips/mach-ath79/include/mach/ath79.h
> @@ -140,4 +140,6 @@ static inline int soc_is_qca956x(void)
>  	return soc_is_tp9343() || soc_is_qca9561();
>  }
>  
> +int ath79_usb_reset(void);
> +
>  #endif /* __ASM_MACH_ATH79_H */
> diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
> index ba38609..bf4bc3b 100644
> --- a/arch/mips/mach-ath79/reset.c
> +++ b/arch/mips/mach-ath79/reset.c
> @@ -5,6 +5,7 @@
>   */
>  
>  #include <common.h>
> +#include <asm/errno.h>
>  #include <asm/io.h>
>  #include <asm/addrspace.h>
>  #include <asm/types.h>
> @@ -69,3 +70,63 @@ u32 get_bootstrap(void)
>  
>  	return 0;
>  }
> +
> +static int usb_reset_ar933x(void __iomem *reset_regs)
> +{
> +	/* Ungate the USB block */
> +	setbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
> +		     AR933X_RESET_USBSUS_OVERRIDE);
> +	mdelay(1);
> +	clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
> +		     AR933X_RESET_USB_HOST);
> +	mdelay(1);
> +	clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
> +		     AR933X_RESET_USB_PHY);
> +	mdelay(1);
> +
> +	return 0;
> +}
> +
> +static int usb_reset_ar934x(void __iomem *reset_regs)
> +{
> +	/* Ungate the USB block */
> +	setbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
> +		     AR934X_RESET_USBSUS_OVERRIDE);
> +	mdelay(1);
> +	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
> +		     AR934X_RESET_USB_PHY);
> +	mdelay(1);
> +	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
> +		     AR934X_RESET_USB_PHY_ANALOG);
> +	mdelay(1);
> +	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
> +		     AR934X_RESET_USB_HOST);
> +	mdelay(1);
> +
> +	return 0;
> +}
> +
> +int ath79_usb_reset(void)
> +{
> +	void __iomem *usbc_regs = map_physmem(AR71XX_USB_CTRL_BASE,
> +					      AR71XX_USB_CTRL_SIZE, MAP_NOCACHE);
> +	void __iomem *reset_regs = map_physmem(AR71XX_RESET_BASE,
> +					       AR71XX_RESET_SIZE, MAP_NOCACHE);
> +
> +	if (!usbc_regs || !reset_regs)
> +		return -EINVAL;

those checks are not necessary

> +
> +	/*
> +	 * Turn on the Buff and Desc swap bits.
> +	 * NOTE: This write into an undocumented register in mandatory to
> +	 *       get the USB controller operational in BigEndian mode.
> +	 */
> +	writel(0xf0000, usbc_regs + AR71XX_USB_CTRL_REG_CONFIG);
> +
> +	if (soc_is_ar933x())
> +		return usb_reset_ar933x(reset_regs);
> +	if (soc_is_ar934x())
> +		return usb_reset_ar934x(reset_regs);
> +
> +	return -EINVAL;
> +}
>
Marek Vasut May 6, 2016, 4:59 p.m. UTC | #2
On 05/06/2016 01:34 PM, Daniel Schwierzeck wrote:
> 
> 
> Am 05.05.2016 um 20:14 schrieb Marek Vasut:
>> Add code to ungate the USB controller on ar933x and ar934x .
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
>> Cc: Wills Wang <wills.wang@live.com>
>> ---
>>  arch/mips/mach-ath79/include/mach/ath79.h |  2 +
>>  arch/mips/mach-ath79/reset.c              | 61 +++++++++++++++++++++++++++++++
>>  2 files changed, 63 insertions(+)
>>
> 
> there are checkpatch.pl warnings:
> 
> warning: arch/mips/mach-ath79/reset.c,112: line over 80 characters

Hm ok, off-by-one character error. Fixed.

>> diff --git a/arch/mips/mach-ath79/include/mach/ath79.h b/arch/mips/mach-ath79/include/mach/ath79.h
>> index 90d80b8..682b6a2 100644
>> --- a/arch/mips/mach-ath79/include/mach/ath79.h
>> +++ b/arch/mips/mach-ath79/include/mach/ath79.h
>> @@ -140,4 +140,6 @@ static inline int soc_is_qca956x(void)
>>  	return soc_is_tp9343() || soc_is_qca9561();
>>  }
>>  
>> +int ath79_usb_reset(void);
>> +
>>  #endif /* __ASM_MACH_ATH79_H */
>> diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
>> index ba38609..bf4bc3b 100644
>> --- a/arch/mips/mach-ath79/reset.c
>> +++ b/arch/mips/mach-ath79/reset.c
>> @@ -5,6 +5,7 @@
>>   */
>>  
>>  #include <common.h>
>> +#include <asm/errno.h>
>>  #include <asm/io.h>
>>  #include <asm/addrspace.h>
>>  #include <asm/types.h>
>> @@ -69,3 +70,63 @@ u32 get_bootstrap(void)
>>  
>>  	return 0;
>>  }
>> +
>> +static int usb_reset_ar933x(void __iomem *reset_regs)
>> +{
>> +	/* Ungate the USB block */
>> +	setbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
>> +		     AR933X_RESET_USBSUS_OVERRIDE);
>> +	mdelay(1);
>> +	clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
>> +		     AR933X_RESET_USB_HOST);
>> +	mdelay(1);
>> +	clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
>> +		     AR933X_RESET_USB_PHY);
>> +	mdelay(1);
>> +
>> +	return 0;
>> +}
>> +
>> +static int usb_reset_ar934x(void __iomem *reset_regs)
>> +{
>> +	/* Ungate the USB block */
>> +	setbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
>> +		     AR934X_RESET_USBSUS_OVERRIDE);
>> +	mdelay(1);
>> +	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
>> +		     AR934X_RESET_USB_PHY);
>> +	mdelay(1);
>> +	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
>> +		     AR934X_RESET_USB_PHY_ANALOG);
>> +	mdelay(1);
>> +	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
>> +		     AR934X_RESET_USB_HOST);
>> +	mdelay(1);
>> +
>> +	return 0;
>> +}
>> +
>> +int ath79_usb_reset(void)
>> +{
>> +	void __iomem *usbc_regs = map_physmem(AR71XX_USB_CTRL_BASE,
>> +					      AR71XX_USB_CTRL_SIZE, MAP_NOCACHE);
>> +	void __iomem *reset_regs = map_physmem(AR71XX_RESET_BASE,
>> +					       AR71XX_RESET_SIZE, MAP_NOCACHE);
>> +
>> +	if (!usbc_regs || !reset_regs)
>> +		return -EINVAL;
> 
> those checks are not necessary

OK, dropped.

>> +
>> +	/*
>> +	 * Turn on the Buff and Desc swap bits.
>> +	 * NOTE: This write into an undocumented register in mandatory to
>> +	 *       get the USB controller operational in BigEndian mode.
>> +	 */
>> +	writel(0xf0000, usbc_regs + AR71XX_USB_CTRL_REG_CONFIG);
>> +
>> +	if (soc_is_ar933x())
>> +		return usb_reset_ar933x(reset_regs);
>> +	if (soc_is_ar934x())
>> +		return usb_reset_ar934x(reset_regs);
>> +
>> +	return -EINVAL;
>> +}
>>
>
diff mbox

Patch

diff --git a/arch/mips/mach-ath79/include/mach/ath79.h b/arch/mips/mach-ath79/include/mach/ath79.h
index 90d80b8..682b6a2 100644
--- a/arch/mips/mach-ath79/include/mach/ath79.h
+++ b/arch/mips/mach-ath79/include/mach/ath79.h
@@ -140,4 +140,6 @@  static inline int soc_is_qca956x(void)
 	return soc_is_tp9343() || soc_is_qca9561();
 }
 
+int ath79_usb_reset(void);
+
 #endif /* __ASM_MACH_ATH79_H */
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
index ba38609..bf4bc3b 100644
--- a/arch/mips/mach-ath79/reset.c
+++ b/arch/mips/mach-ath79/reset.c
@@ -5,6 +5,7 @@ 
  */
 
 #include <common.h>
+#include <asm/errno.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
@@ -69,3 +70,63 @@  u32 get_bootstrap(void)
 
 	return 0;
 }
+
+static int usb_reset_ar933x(void __iomem *reset_regs)
+{
+	/* Ungate the USB block */
+	setbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
+		     AR933X_RESET_USBSUS_OVERRIDE);
+	mdelay(1);
+	clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
+		     AR933X_RESET_USB_HOST);
+	mdelay(1);
+	clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE,
+		     AR933X_RESET_USB_PHY);
+	mdelay(1);
+
+	return 0;
+}
+
+static int usb_reset_ar934x(void __iomem *reset_regs)
+{
+	/* Ungate the USB block */
+	setbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
+		     AR934X_RESET_USBSUS_OVERRIDE);
+	mdelay(1);
+	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
+		     AR934X_RESET_USB_PHY);
+	mdelay(1);
+	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
+		     AR934X_RESET_USB_PHY_ANALOG);
+	mdelay(1);
+	clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE,
+		     AR934X_RESET_USB_HOST);
+	mdelay(1);
+
+	return 0;
+}
+
+int ath79_usb_reset(void)
+{
+	void __iomem *usbc_regs = map_physmem(AR71XX_USB_CTRL_BASE,
+					      AR71XX_USB_CTRL_SIZE, MAP_NOCACHE);
+	void __iomem *reset_regs = map_physmem(AR71XX_RESET_BASE,
+					       AR71XX_RESET_SIZE, MAP_NOCACHE);
+
+	if (!usbc_regs || !reset_regs)
+		return -EINVAL;
+
+	/*
+	 * Turn on the Buff and Desc swap bits.
+	 * NOTE: This write into an undocumented register in mandatory to
+	 *       get the USB controller operational in BigEndian mode.
+	 */
+	writel(0xf0000, usbc_regs + AR71XX_USB_CTRL_REG_CONFIG);
+
+	if (soc_is_ar933x())
+		return usb_reset_ar933x(reset_regs);
+	if (soc_is_ar934x())
+		return usb_reset_ar934x(reset_regs);
+
+	return -EINVAL;
+}