Message ID | 1460750052-16285-10-git-send-email-zajec5@gmail.com |
---|---|
State | Accepted |
Commit | ef296dc947f6a9300a7fb5b696d1e1f543479e18 |
Headers | show |
On Fri, 2016-04-15 at 21:54 +0200, Rafał Miłecki wrote: > NAND core sets ECC algorithm in algo field now and it should be > preferred over the mode field. This also prepares driver for dropping > NAND_ECC_SOFT_BCH. > > Signed-off-by: Rafał Miłecki <zajec5@gmail.com> > --- > drivers/mtd/nand/fsmc_nand.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c > index 1372040..0f8c63f 100644 > --- a/drivers/mtd/nand/fsmc_nand.c > +++ b/drivers/mtd/nand/fsmc_nand.c > @@ -958,9 +958,12 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) > nand->ecc.strength = 1; > break; > > + case NAND_ECC_SOFT: > case NAND_ECC_SOFT_BCH: > - dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); > - break; > + if (nand->ecc.algo == NAND_ECC_BCH) { > + dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); > + break; > + } > > default: > dev_err(&pdev->dev, "Unsupported ECC mode!\n"); Why not just add NAND_ECC_SOFT above the default case?
On Fri, 2016-04-15 at 13:23 -0700, Joe Perches wrote:
> Why not just add NAND_ECC_SOFT above the default case?
Nevermind, misread.
On 15 April 2016 at 22:24, Joe Perches <joe@perches.com> wrote: > On Fri, 2016-04-15 at 13:23 -0700, Joe Perches wrote: >> Why not just add NAND_ECC_SOFT above the default case? > > Nevermind, misread. At least someone reviews it which is nice :)
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index 1372040..0f8c63f 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -958,9 +958,12 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) nand->ecc.strength = 1; break; + case NAND_ECC_SOFT: case NAND_ECC_SOFT_BCH: - dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); - break; + if (nand->ecc.algo == NAND_ECC_BCH) { + dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); + break; + } default: dev_err(&pdev->dev, "Unsupported ECC mode!\n");
NAND core sets ECC algorithm in algo field now and it should be preferred over the mode field. This also prepares driver for dropping NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> --- drivers/mtd/nand/fsmc_nand.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)