diff mbox

[U-Boot,v3,1/2] net: phy: dp83867: Add device tree bindings and documentation

Message ID 1459942680-18696-1-git-send-email-dmurphy@ti.com
State Superseded
Delegated to: Joe Hershberger
Headers show

Commit Message

Dan Murphy April 6, 2016, 11:37 a.m. UTC
Add the device tree bindings and the accompanying documentation
for the TI DP83867 Giga bit ethernet phy driver.

The original document was from:
    [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]

Signed-off-by: Dan Murphy <dmurphy@ti.com>
---

v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/

 doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++
 include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
 2 files changed, 64 insertions(+)
 create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
 create mode 100644 include/dt-bindings/net/ti-dp83867.h

Comments

Mugunthan V N April 7, 2016, 4:45 a.m. UTC | #1
On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
> Add the device tree bindings and the accompanying documentation
> for the TI DP83867 Giga bit ethernet phy driver.
> 
> The original document was from:
>     [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> 
> v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/
> 
>  doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++
>  include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
>  2 files changed, 64 insertions(+)
>  create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
>  create mode 100644 include/dt-bindings/net/ti-dp83867.h
> 
> diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
> new file mode 100644
> index 0000000..0ec009c
> --- /dev/null
> +++ b/doc/device-tree-bindings/net/ti,dp83867.txt
> @@ -0,0 +1,29 @@
> +* Texas Instruments - dp83867 Giga bit ethernet phy
> +
> +Required properties:
> +	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
> +		for applicable values
> +	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
> +		for applicable values
> +	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
> +		for applicable values
> +
> +Default child nodes are standard Ethernet PHY device
> +nodes as described in doc/devicetree/bindings/net/ethernet.txt
> +
> +Example:
> +
> +&mac {
> +	pinctrl-0 = <&davinci_mdio_default>;
> +	pinctrl-1 = <&davinci_mdio_sleep>;
> +	status = "okay";
> +
> +	ti,rx_internal_delay = <DP83867_RGMIIDCTL_1_50_NS>;
> +	ti,tx_internal_delay = <DP83867_RGMIIDCTL_2_50_NS>;
> +	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> +
> +};

This example should in phy node and not in mac node as per the linux
commmit mentioned above?

Regards
Mugunthan V N

> +
> +
> +Datasheet can be found:
> +http://www.ti.com/product/DP83867IR/datasheet
> diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h
> new file mode 100644
> index 0000000..5c592fb
> --- /dev/null
> +++ b/include/dt-bindings/net/ti-dp83867.h
> @@ -0,0 +1,35 @@
> +/*
> + * TI DP83867 PHY drivers
> + *
> + * SPDX-License-Identifier:	GPL-2.0
> + *
> + */
> +
> +#ifndef _DT_BINDINGS_TI_DP83867_H
> +#define _DT_BINDINGS_TI_DP83867_H
> +
> +/* PHY CTRL bits */
> +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	0x00
> +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	0x01
> +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	0x02
> +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	0x03
> +
> +/* RGMIIDCTL internal delay for rx and tx */
> +#define	DP83867_RGMIIDCTL_250_PS	0x0
> +#define	DP83867_RGMIIDCTL_500_PS	0x1
> +#define	DP83867_RGMIIDCTL_750_PS	0x2
> +#define	DP83867_RGMIIDCTL_1_NS		0x3
> +#define	DP83867_RGMIIDCTL_1_25_NS	0x4
> +#define	DP83867_RGMIIDCTL_1_50_NS	0x5
> +#define	DP83867_RGMIIDCTL_1_75_NS	0x6
> +#define	DP83867_RGMIIDCTL_2_00_NS	0x7
> +#define	DP83867_RGMIIDCTL_2_25_NS	0x8
> +#define	DP83867_RGMIIDCTL_2_50_NS	0x9
> +#define	DP83867_RGMIIDCTL_2_75_NS	0xa
> +#define	DP83867_RGMIIDCTL_3_00_NS	0xb
> +#define	DP83867_RGMIIDCTL_3_25_NS	0xc
> +#define	DP83867_RGMIIDCTL_3_50_NS	0xd
> +#define	DP83867_RGMIIDCTL_3_75_NS	0xe
> +#define	DP83867_RGMIIDCTL_4_00_NS	0xf
> +
> +#endif
>
Dan Murphy April 7, 2016, 4:02 p.m. UTC | #2
Mugunthan

On 04/06/2016 11:45 PM, Mugunthan V N wrote:
> On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
>> Add the device tree bindings and the accompanying documentation
>> for the TI DP83867 Giga bit ethernet phy driver.
>>
>> The original document was from:
>>     [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
>>
>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>> ---
>>
>> v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/
>>
>>  doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++
>>  include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
>>  2 files changed, 64 insertions(+)
>>  create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
>>  create mode 100644 include/dt-bindings/net/ti-dp83867.h
>>
>> diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
>> new file mode 100644
>> index 0000000..0ec009c
>> --- /dev/null
>> +++ b/doc/device-tree-bindings/net/ti,dp83867.txt
>> @@ -0,0 +1,29 @@
>> +* Texas Instruments - dp83867 Giga bit ethernet phy
>> +
>> +Required properties:
>> +	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
>> +		for applicable values
>> +	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
>> +		for applicable values
>> +	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
>> +		for applicable values
>> +
>> +Default child nodes are standard Ethernet PHY device
>> +nodes as described in doc/devicetree/bindings/net/ethernet.txt
>> +
>> +Example:
>> +
>> +&mac {
>> +	pinctrl-0 = <&davinci_mdio_default>;
>> +	pinctrl-1 = <&davinci_mdio_sleep>;
>> +	status = "okay";
>> +
>> +	ti,rx_internal_delay = <DP83867_RGMIIDCTL_1_50_NS>;
>> +	ti,tx_internal_delay = <DP83867_RGMIIDCTL_2_50_NS>;
>> +	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
>> +
>> +};
> This example should in phy node and not in mac node as per the linux
> commmit mentioned above?

Are you saying that the code should look like this

&mac {
     pinctrl-0 = <&davinci_mdio_default>;
     pinctrl-1 = <&davinci_mdio_sleep>;
     status = "okay";
    phy-handle = <&ethernet_phy>;

    ethernet_phy: ethernet-phy@0 {
        reg = <0>;
        ti,rx_int_delay = <DP83867_RGMIIDCTL_2_25_NS>;
        ti,tx_int_delay = <DP83867_RGMIIDCTL_2_75_NS>;
        ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    };

This is the way it is in the kernel.

uBoot cpsw code is missing the kernel patch 9e42f7152 to be able to do this.

Dan
>
> Regards
> Mugunthan V N
>
>> +
>> +
>> +Datasheet can be found:
>> +http://www.ti.com/product/DP83867IR/datasheet
>> diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h
>> new file mode 100644
>> index 0000000..5c592fb
>> --- /dev/null
>> +++ b/include/dt-bindings/net/ti-dp83867.h
>> @@ -0,0 +1,35 @@
>> +/*
>> + * TI DP83867 PHY drivers
>> + *
>> + * SPDX-License-Identifier:	GPL-2.0
>> + *
>> + */
>> +
>> +#ifndef _DT_BINDINGS_TI_DP83867_H
>> +#define _DT_BINDINGS_TI_DP83867_H
>> +
>> +/* PHY CTRL bits */
>> +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	0x00
>> +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	0x01
>> +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	0x02
>> +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	0x03
>> +
>> +/* RGMIIDCTL internal delay for rx and tx */
>> +#define	DP83867_RGMIIDCTL_250_PS	0x0
>> +#define	DP83867_RGMIIDCTL_500_PS	0x1
>> +#define	DP83867_RGMIIDCTL_750_PS	0x2
>> +#define	DP83867_RGMIIDCTL_1_NS		0x3
>> +#define	DP83867_RGMIIDCTL_1_25_NS	0x4
>> +#define	DP83867_RGMIIDCTL_1_50_NS	0x5
>> +#define	DP83867_RGMIIDCTL_1_75_NS	0x6
>> +#define	DP83867_RGMIIDCTL_2_00_NS	0x7
>> +#define	DP83867_RGMIIDCTL_2_25_NS	0x8
>> +#define	DP83867_RGMIIDCTL_2_50_NS	0x9
>> +#define	DP83867_RGMIIDCTL_2_75_NS	0xa
>> +#define	DP83867_RGMIIDCTL_3_00_NS	0xb
>> +#define	DP83867_RGMIIDCTL_3_25_NS	0xc
>> +#define	DP83867_RGMIIDCTL_3_50_NS	0xd
>> +#define	DP83867_RGMIIDCTL_3_75_NS	0xe
>> +#define	DP83867_RGMIIDCTL_4_00_NS	0xf
>> +
>> +#endif
>>
Michal Simek April 8, 2016, 9:25 a.m. UTC | #3
On 7.4.2016 18:02, Dan Murphy wrote:
> Mugunthan
> 
> On 04/06/2016 11:45 PM, Mugunthan V N wrote:
>> On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
>>> Add the device tree bindings and the accompanying documentation
>>> for the TI DP83867 Giga bit ethernet phy driver.
>>>
>>> The original document was from:
>>>     [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
>>>
>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>> ---
>>>
>>> v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/
>>>
>>>  doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++
>>>  include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
>>>  2 files changed, 64 insertions(+)
>>>  create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
>>>  create mode 100644 include/dt-bindings/net/ti-dp83867.h
>>>
>>> diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
>>> new file mode 100644
>>> index 0000000..0ec009c
>>> --- /dev/null
>>> +++ b/doc/device-tree-bindings/net/ti,dp83867.txt
>>> @@ -0,0 +1,29 @@
>>> +* Texas Instruments - dp83867 Giga bit ethernet phy
>>> +
>>> +Required properties:
>>> +	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
>>> +		for applicable values
>>> +	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
>>> +		for applicable values
>>> +	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
>>> +		for applicable values
>>> +
>>> +Default child nodes are standard Ethernet PHY device
>>> +nodes as described in doc/devicetree/bindings/net/ethernet.txt
>>> +
>>> +Example:
>>> +
>>> +&mac {
>>> +	pinctrl-0 = <&davinci_mdio_default>;
>>> +	pinctrl-1 = <&davinci_mdio_sleep>;
>>> +	status = "okay";
>>> +
>>> +	ti,rx_internal_delay = <DP83867_RGMIIDCTL_1_50_NS>;
>>> +	ti,tx_internal_delay = <DP83867_RGMIIDCTL_2_50_NS>;
>>> +	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
>>> +
>>> +};
>> This example should in phy node and not in mac node as per the linux
>> commmit mentioned above?
> 
> Are you saying that the code should look like this
> 
> &mac {
>      pinctrl-0 = <&davinci_mdio_default>;
>      pinctrl-1 = <&davinci_mdio_sleep>;
>      status = "okay";
>     phy-handle = <&ethernet_phy>;
> 
>     ethernet_phy: ethernet-phy@0 {
>         reg = <0>;
>         ti,rx_int_delay = <DP83867_RGMIIDCTL_2_25_NS>;
>         ti,tx_int_delay = <DP83867_RGMIIDCTL_2_75_NS>;
>         ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>     };
> 
> This is the way it is in the kernel.

First of all. Please rebase your 2/2 on the top of current branch.
sgmii support was added recently.

Here is what I use on zynqmp.
http://lists.denx.de/pipermail/u-boot/2016-April/250866.html
And it reflects the description above.

Thanks,
Michal
Dan Murphy April 8, 2016, 12:05 p.m. UTC | #4
On 04/08/2016 04:25 AM, Michal Simek wrote:
> On 7.4.2016 18:02, Dan Murphy wrote:
>> Mugunthan
>>
>> On 04/06/2016 11:45 PM, Mugunthan V N wrote:
>>> On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
>>>> Add the device tree bindings and the accompanying documentation
>>>> for the TI DP83867 Giga bit ethernet phy driver.
>>>>
>>>> The original document was from:
>>>>     [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
>>>>
>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>>> ---
>>>>
>>>> v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/
>>>>
>>>>  doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++
>>>>  include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
>>>>  2 files changed, 64 insertions(+)
>>>>  create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
>>>>  create mode 100644 include/dt-bindings/net/ti-dp83867.h
>>>>
>>>> diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
>>>> new file mode 100644
>>>> index 0000000..0ec009c
>>>> --- /dev/null
>>>> +++ b/doc/device-tree-bindings/net/ti,dp83867.txt
>>>> @@ -0,0 +1,29 @@
>>>> +* Texas Instruments - dp83867 Giga bit ethernet phy
>>>> +
>>>> +Required properties:
>>>> +	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
>>>> +		for applicable values
>>>> +	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
>>>> +		for applicable values
>>>> +	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
>>>> +		for applicable values
>>>> +
>>>> +Default child nodes are standard Ethernet PHY device
>>>> +nodes as described in doc/devicetree/bindings/net/ethernet.txt
>>>> +
>>>> +Example:
>>>> +
>>>> +&mac {
>>>> +	pinctrl-0 = <&davinci_mdio_default>;
>>>> +	pinctrl-1 = <&davinci_mdio_sleep>;
>>>> +	status = "okay";
>>>> +
>>>> +	ti,rx_internal_delay = <DP83867_RGMIIDCTL_1_50_NS>;
>>>> +	ti,tx_internal_delay = <DP83867_RGMIIDCTL_2_50_NS>;
>>>> +	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
>>>> +
>>>> +};
>>> This example should in phy node and not in mac node as per the linux
>>> commmit mentioned above?
>> Are you saying that the code should look like this
>>
>> &mac {
>>      pinctrl-0 = <&davinci_mdio_default>;
>>      pinctrl-1 = <&davinci_mdio_sleep>;
>>      status = "okay";
>>     phy-handle = <&ethernet_phy>;
>>
>>     ethernet_phy: ethernet-phy@0 {
>>         reg = <0>;
>>         ti,rx_int_delay = <DP83867_RGMIIDCTL_2_25_NS>;
>>         ti,tx_int_delay = <DP83867_RGMIIDCTL_2_75_NS>;
>>         ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>>     };
>>
>> This is the way it is in the kernel.
> First of all. Please rebase your 2/2 on the top of current branch.
> sgmii support was added recently.

Yeah I had a feeling that I was going to need to do that.

>
> Here is what I use on zynqmp.
> http://lists.denx.de/pipermail/u-boot/2016-April/250866.html
> And it reflects the description above.

OK the zync_gem supports phy-handle.  cpsw does not.  Looks like I have
to add a patch to cpsw.

Dan

>
> Thanks,
> Michal
Michal Simek April 8, 2016, 12:29 p.m. UTC | #5
On 8.4.2016 14:05, Dan Murphy wrote:
> On 04/08/2016 04:25 AM, Michal Simek wrote:
>> On 7.4.2016 18:02, Dan Murphy wrote:
>>> Mugunthan
>>>
>>> On 04/06/2016 11:45 PM, Mugunthan V N wrote:
>>>> On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
>>>>> Add the device tree bindings and the accompanying documentation
>>>>> for the TI DP83867 Giga bit ethernet phy driver.
>>>>>
>>>>> The original document was from:
>>>>>     [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
>>>>>
>>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>>>> ---
>>>>>
>>>>> v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/
>>>>>
>>>>>  doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++
>>>>>  include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
>>>>>  2 files changed, 64 insertions(+)
>>>>>  create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
>>>>>  create mode 100644 include/dt-bindings/net/ti-dp83867.h
>>>>>
>>>>> diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
>>>>> new file mode 100644
>>>>> index 0000000..0ec009c
>>>>> --- /dev/null
>>>>> +++ b/doc/device-tree-bindings/net/ti,dp83867.txt
>>>>> @@ -0,0 +1,29 @@
>>>>> +* Texas Instruments - dp83867 Giga bit ethernet phy
>>>>> +
>>>>> +Required properties:
>>>>> +	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
>>>>> +		for applicable values
>>>>> +	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
>>>>> +		for applicable values
>>>>> +	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
>>>>> +		for applicable values
>>>>> +
>>>>> +Default child nodes are standard Ethernet PHY device
>>>>> +nodes as described in doc/devicetree/bindings/net/ethernet.txt
>>>>> +
>>>>> +Example:
>>>>> +
>>>>> +&mac {
>>>>> +	pinctrl-0 = <&davinci_mdio_default>;
>>>>> +	pinctrl-1 = <&davinci_mdio_sleep>;
>>>>> +	status = "okay";
>>>>> +
>>>>> +	ti,rx_internal_delay = <DP83867_RGMIIDCTL_1_50_NS>;
>>>>> +	ti,tx_internal_delay = <DP83867_RGMIIDCTL_2_50_NS>;
>>>>> +	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
>>>>> +
>>>>> +};
>>>> This example should in phy node and not in mac node as per the linux
>>>> commmit mentioned above?
>>> Are you saying that the code should look like this
>>>
>>> &mac {
>>>      pinctrl-0 = <&davinci_mdio_default>;
>>>      pinctrl-1 = <&davinci_mdio_sleep>;
>>>      status = "okay";
>>>     phy-handle = <&ethernet_phy>;
>>>
>>>     ethernet_phy: ethernet-phy@0 {
>>>         reg = <0>;
>>>         ti,rx_int_delay = <DP83867_RGMIIDCTL_2_25_NS>;
>>>         ti,tx_int_delay = <DP83867_RGMIIDCTL_2_75_NS>;
>>>         ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>>>     };
>>>
>>> This is the way it is in the kernel.
>> First of all. Please rebase your 2/2 on the top of current branch.
>> sgmii support was added recently.
> 
> Yeah I had a feeling that I was going to need to do that.
> 
>>
>> Here is what I use on zynqmp.
>> http://lists.denx.de/pipermail/u-boot/2016-April/250866.html
>> And it reflects the description above.
> 
> OK the zync_gem supports phy-handle.  cpsw does not.  Looks like I have
> to add a patch to cpsw.

yep but again your patch is failing on zynqmp. Because I don't think
there is hook to read that values from DT.
I didn't look at details but definitely please check it.

Thanks,
Michal
Dan Murphy April 8, 2016, 3:26 p.m. UTC | #6
On 04/08/2016 07:29 AM, Michal Simek wrote:
> On 8.4.2016 14:05, Dan Murphy wrote:
>> On 04/08/2016 04:25 AM, Michal Simek wrote:
>>> On 7.4.2016 18:02, Dan Murphy wrote:
>>>> Mugunthan
>>>>
>>>> On 04/06/2016 11:45 PM, Mugunthan V N wrote:
>>>>> On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
>>>>>> Add the device tree bindings and the accompanying documentation
>>>>>> for the TI DP83867 Giga bit ethernet phy driver.
>>>>>>
>>>>>> The original document was from:
>>>>>>     [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
>>>>>>
>>>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>>>>> ---
>>>>>>
>>>>>> v3 - Modify the binding to the kernel changed int -> internal for the delay - https://patchwork.ozlabs.org/patch/606595/
>>>>>>
>>>>>>  doc/device-tree-bindings/net/ti,dp83867.txt | 29 ++++++++++++++++++++++++
>>>>>>  include/dt-bindings/net/ti-dp83867.h        | 35 +++++++++++++++++++++++++++++
>>>>>>  2 files changed, 64 insertions(+)
>>>>>>  create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt
>>>>>>  create mode 100644 include/dt-bindings/net/ti-dp83867.h
>>>>>>
>>>>>> diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
>>>>>> new file mode 100644
>>>>>> index 0000000..0ec009c
>>>>>> --- /dev/null
>>>>>> +++ b/doc/device-tree-bindings/net/ti,dp83867.txt
>>>>>> @@ -0,0 +1,29 @@
>>>>>> +* Texas Instruments - dp83867 Giga bit ethernet phy
>>>>>> +
>>>>>> +Required properties:
>>>>>> +	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
>>>>>> +		for applicable values
>>>>>> +	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
>>>>>> +		for applicable values
>>>>>> +	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
>>>>>> +		for applicable values
>>>>>> +
>>>>>> +Default child nodes are standard Ethernet PHY device
>>>>>> +nodes as described in doc/devicetree/bindings/net/ethernet.txt
>>>>>> +
>>>>>> +Example:
>>>>>> +
>>>>>> +&mac {
>>>>>> +	pinctrl-0 = <&davinci_mdio_default>;
>>>>>> +	pinctrl-1 = <&davinci_mdio_sleep>;
>>>>>> +	status = "okay";
>>>>>> +
>>>>>> +	ti,rx_internal_delay = <DP83867_RGMIIDCTL_1_50_NS>;
>>>>>> +	ti,tx_internal_delay = <DP83867_RGMIIDCTL_2_50_NS>;
>>>>>> +	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
>>>>>> +
>>>>>> +};
>>>>> This example should in phy node and not in mac node as per the linux
>>>>> commmit mentioned above?
>>>> Are you saying that the code should look like this
>>>>
>>>> &mac {
>>>>      pinctrl-0 = <&davinci_mdio_default>;
>>>>      pinctrl-1 = <&davinci_mdio_sleep>;
>>>>      status = "okay";
>>>>     phy-handle = <&ethernet_phy>;
>>>>
>>>>     ethernet_phy: ethernet-phy@0 {
>>>>         reg = <0>;
>>>>         ti,rx_int_delay = <DP83867_RGMIIDCTL_2_25_NS>;
>>>>         ti,tx_int_delay = <DP83867_RGMIIDCTL_2_75_NS>;
>>>>         ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>>>>     };
>>>>
>>>> This is the way it is in the kernel.
>>> First of all. Please rebase your 2/2 on the top of current branch.
>>> sgmii support was added recently.
>> Yeah I had a feeling that I was going to need to do that.
>>
>>> Here is what I use on zynqmp.
>>> http://lists.denx.de/pipermail/u-boot/2016-April/250866.html
>>> And it reflects the description above.
>> OK the zync_gem supports phy-handle.  cpsw does not.  Looks like I have
>> to add a patch to cpsw.
> yep but again your patch is failing on zynqmp. Because I don't think
> there is hook to read that values from DT.
> I didn't look at details but definitely please check it.

Actually this is a problem in the zynqmp mac driver.
zynqmp reads the phy-handle and then dumps the information so
the dp83867 or any phy driver for that matter is not getting the data.

I will send a patch in to fix the zynqmp driver as well

Dan

>
> Thanks,
> Michal
>
>
diff mbox

Patch

diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt
new file mode 100644
index 0000000..0ec009c
--- /dev/null
+++ b/doc/device-tree-bindings/net/ti,dp83867.txt
@@ -0,0 +1,29 @@ 
+* Texas Instruments - dp83867 Giga bit ethernet phy
+
+Required properties:
+	- ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
+		for applicable values
+	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
+		for applicable values
+	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
+		for applicable values
+
+Default child nodes are standard Ethernet PHY device
+nodes as described in doc/devicetree/bindings/net/ethernet.txt
+
+Example:
+
+&mac {
+	pinctrl-0 = <&davinci_mdio_default>;
+	pinctrl-1 = <&davinci_mdio_sleep>;
+	status = "okay";
+
+	ti,rx_internal_delay = <DP83867_RGMIIDCTL_1_50_NS>;
+	ti,tx_internal_delay = <DP83867_RGMIIDCTL_2_50_NS>;
+	ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+
+};
+
+
+Datasheet can be found:
+http://www.ti.com/product/DP83867IR/datasheet
diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h
new file mode 100644
index 0000000..5c592fb
--- /dev/null
+++ b/include/dt-bindings/net/ti-dp83867.h
@@ -0,0 +1,35 @@ 
+/*
+ * TI DP83867 PHY drivers
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ *
+ */
+
+#ifndef _DT_BINDINGS_TI_DP83867_H
+#define _DT_BINDINGS_TI_DP83867_H
+
+/* PHY CTRL bits */
+#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB	0x00
+#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB	0x01
+#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB	0x02
+#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB	0x03
+
+/* RGMIIDCTL internal delay for rx and tx */
+#define	DP83867_RGMIIDCTL_250_PS	0x0
+#define	DP83867_RGMIIDCTL_500_PS	0x1
+#define	DP83867_RGMIIDCTL_750_PS	0x2
+#define	DP83867_RGMIIDCTL_1_NS		0x3
+#define	DP83867_RGMIIDCTL_1_25_NS	0x4
+#define	DP83867_RGMIIDCTL_1_50_NS	0x5
+#define	DP83867_RGMIIDCTL_1_75_NS	0x6
+#define	DP83867_RGMIIDCTL_2_00_NS	0x7
+#define	DP83867_RGMIIDCTL_2_25_NS	0x8
+#define	DP83867_RGMIIDCTL_2_50_NS	0x9
+#define	DP83867_RGMIIDCTL_2_75_NS	0xa
+#define	DP83867_RGMIIDCTL_3_00_NS	0xb
+#define	DP83867_RGMIIDCTL_3_25_NS	0xc
+#define	DP83867_RGMIIDCTL_3_50_NS	0xd
+#define	DP83867_RGMIIDCTL_3_75_NS	0xe
+#define	DP83867_RGMIIDCTL_4_00_NS	0xf
+
+#endif