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[U-Boot,1/2] arm: mx6: Add UART8 base address for i.MX6UL

Message ID 1455100886-21291-1-git-send-email-sr@denx.de
State Accepted
Commit 51560f0b04fa147f135d160eb655c8ec9e41462c
Delegated to: Stefano Babic
Headers show

Commit Message

Stefan Roese Feb. 10, 2016, 10:41 a.m. UTC
Add the base address for the i.MX6UL so that this UART can be used.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mx6/imx-regs.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Stefano Babic Feb. 21, 2016, 10:16 a.m. UTC | #1
On 10/02/2016 11:41, Stefan Roese wrote:
> Add the base address for the i.MX6UL so that this UART can be used.
> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Ye Li <ye.li@nxp.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  arch/arm/include/asm/arch-mx6/imx-regs.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 5c45bf6..d0e6bf2 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -162,6 +162,7 @@
>  #endif
>  #define UART1_BASE                  (ATZ1_BASE_ADDR + 0x20000)
>  #define ESAI1_BASE_ADDR             (ATZ1_BASE_ADDR + 0x24000)
> +#define UART8_BASE                  (ATZ1_BASE_ADDR + 0x24000)
>  #define SSI1_BASE_ADDR              (ATZ1_BASE_ADDR + 0x28000)
>  #define SSI2_BASE_ADDR              (ATZ1_BASE_ADDR + 0x2C000)
>  #define SSI3_BASE_ADDR              (ATZ1_BASE_ADDR + 0x30000)
> 

Reviewed-by : Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 5c45bf6..d0e6bf2 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -162,6 +162,7 @@ 
 #endif
 #define UART1_BASE                  (ATZ1_BASE_ADDR + 0x20000)
 #define ESAI1_BASE_ADDR             (ATZ1_BASE_ADDR + 0x24000)
+#define UART8_BASE                  (ATZ1_BASE_ADDR + 0x24000)
 #define SSI1_BASE_ADDR              (ATZ1_BASE_ADDR + 0x28000)
 #define SSI2_BASE_ADDR              (ATZ1_BASE_ADDR + 0x2C000)
 #define SSI3_BASE_ADDR              (ATZ1_BASE_ADDR + 0x30000)