diff mbox

[v1,10/17] target-arm: implement setend

Message ID 2e141a5f2a5c38936bdf1a06eaeb1a5595f0f833.1453100525.git.crosthwaite.peter@gmail.com
State New
Headers show

Commit Message

Peter Crosthwaite Jan. 18, 2016, 7:12 a.m. UTC
From: Paolo Bonzini <pbonzini@redhat.com>

Since this is not a high-performance path, just use a helper to
flip the E bit and force a lookup in the hash table since the
flags have changed.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
---

 target-arm/helper.h    |  1 +
 target-arm/op_helper.c |  5 +++++
 target-arm/translate.c | 16 ++++++++--------
 3 files changed, 14 insertions(+), 8 deletions(-)

Comments

Peter Maydell Jan. 19, 2016, 4:29 p.m. UTC | #1
On 18 January 2016 at 07:12, Peter Crosthwaite
<crosthwaitepeter@gmail.com> wrote:
> From: Paolo Bonzini <pbonzini@redhat.com>
>
> Since this is not a high-performance path, just use a helper to
> flip the E bit and force a lookup in the hash table since the
> flags have changed.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
> ---
>
>  target-arm/helper.h    |  1 +
>  target-arm/op_helper.c |  5 +++++
>  target-arm/translate.c | 16 ++++++++--------
>  3 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/target-arm/helper.h b/target-arm/helper.h
> index c2a85c7..2315a9c 100644
> --- a/target-arm/helper.h
> +++ b/target-arm/helper.h
> @@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE,
>                     i32, i32, i32, i32)
>  DEF_HELPER_2(exception_internal, void, env, i32)
>  DEF_HELPER_4(exception_with_syndrome, void, env, i32, i32, i32)
> +DEF_HELPER_1(setend, void, env)
>  DEF_HELPER_1(wfi, void, env)
>  DEF_HELPER_1(wfe, void, env)
>  DEF_HELPER_1(yield, void, env)
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index e42d287..2a4bc67 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -295,6 +295,11 @@ uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift)
>      return res;
>  }
>
> +void HELPER(setend)(CPUARMState *env)
> +{
> +    env->uncached_cpsr ^= CPSR_E;
> +}
> +
>  /* Function checks whether WFx (WFI/WFE) instructions are set up to be trapped.
>   * The function returns the target EL (1-3) if the instruction is to be trapped;
>   * otherwise it returns 0 indicating it is not trapped.
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index cb925ef..192a5d6 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -7726,10 +7726,10 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
>          if ((insn & 0x0ffffdff) == 0x01010000) {
>              ARCH(6);
>              /* setend */
> -            if (((insn >> 9) & 1) != s->bswap_code) {
> -                /* Dynamic endianness switching not implemented. */
> -                qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
> -                goto illegal_op;
> +            if (((insn >> 9) & 1) != !!(s->mo_endianness == MO_BE)) {
> +                gen_helper_setend(cpu_env);
> +                gen_set_pc_im(s, s->pc);
> +                s->is_jmp = DISAS_JUMP;

Rather than manually calling set_pc_im and using DISAS_JUMP, better
to use DISAS_UPDATE, which will do the gen_set_pc_im() call for you.

(Ditto in the other hunk.)

thanks
-- PMM
Peter Crosthwaite Feb. 27, 2016, 10:14 p.m. UTC | #2
On Tue, Jan 19, 2016 at 8:29 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 18 January 2016 at 07:12, Peter Crosthwaite
> <crosthwaitepeter@gmail.com> wrote:
>> From: Paolo Bonzini <pbonzini@redhat.com>
>>
>> Since this is not a high-performance path, just use a helper to
>> flip the E bit and force a lookup in the hash table since the
>> flags have changed.
>>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
>> ---
>>
>>  target-arm/helper.h    |  1 +
>>  target-arm/op_helper.c |  5 +++++
>>  target-arm/translate.c | 16 ++++++++--------
>>  3 files changed, 14 insertions(+), 8 deletions(-)
>>
>> diff --git a/target-arm/helper.h b/target-arm/helper.h
>> index c2a85c7..2315a9c 100644
>> --- a/target-arm/helper.h
>> +++ b/target-arm/helper.h
>> @@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE,
>>                     i32, i32, i32, i32)
>>  DEF_HELPER_2(exception_internal, void, env, i32)
>>  DEF_HELPER_4(exception_with_syndrome, void, env, i32, i32, i32)
>> +DEF_HELPER_1(setend, void, env)
>>  DEF_HELPER_1(wfi, void, env)
>>  DEF_HELPER_1(wfe, void, env)
>>  DEF_HELPER_1(yield, void, env)
>> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
>> index e42d287..2a4bc67 100644
>> --- a/target-arm/op_helper.c
>> +++ b/target-arm/op_helper.c
>> @@ -295,6 +295,11 @@ uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift)
>>      return res;
>>  }
>>
>> +void HELPER(setend)(CPUARMState *env)
>> +{
>> +    env->uncached_cpsr ^= CPSR_E;
>> +}
>> +
>>  /* Function checks whether WFx (WFI/WFE) instructions are set up to be trapped.
>>   * The function returns the target EL (1-3) if the instruction is to be trapped;
>>   * otherwise it returns 0 indicating it is not trapped.
>> diff --git a/target-arm/translate.c b/target-arm/translate.c
>> index cb925ef..192a5d6 100644
>> --- a/target-arm/translate.c
>> +++ b/target-arm/translate.c
>> @@ -7726,10 +7726,10 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
>>          if ((insn & 0x0ffffdff) == 0x01010000) {
>>              ARCH(6);
>>              /* setend */
>> -            if (((insn >> 9) & 1) != s->bswap_code) {
>> -                /* Dynamic endianness switching not implemented. */
>> -                qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
>> -                goto illegal_op;
>> +            if (((insn >> 9) & 1) != !!(s->mo_endianness == MO_BE)) {
>> +                gen_helper_setend(cpu_env);
>> +                gen_set_pc_im(s, s->pc);
>> +                s->is_jmp = DISAS_JUMP;
>
> Rather than manually calling set_pc_im and using DISAS_JUMP, better
> to use DISAS_UPDATE, which will do the gen_set_pc_im() call for you.
>
> (Ditto in the other hunk.)
>

Fixed.

Regards,
Peter

> thanks
> -- PMM
diff mbox

Patch

diff --git a/target-arm/helper.h b/target-arm/helper.h
index c2a85c7..2315a9c 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -48,6 +48,7 @@  DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE,
                    i32, i32, i32, i32)
 DEF_HELPER_2(exception_internal, void, env, i32)
 DEF_HELPER_4(exception_with_syndrome, void, env, i32, i32, i32)
+DEF_HELPER_1(setend, void, env)
 DEF_HELPER_1(wfi, void, env)
 DEF_HELPER_1(wfe, void, env)
 DEF_HELPER_1(yield, void, env)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index e42d287..2a4bc67 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -295,6 +295,11 @@  uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift)
     return res;
 }
 
+void HELPER(setend)(CPUARMState *env)
+{
+    env->uncached_cpsr ^= CPSR_E;
+}
+
 /* Function checks whether WFx (WFI/WFE) instructions are set up to be trapped.
  * The function returns the target EL (1-3) if the instruction is to be trapped;
  * otherwise it returns 0 indicating it is not trapped.
diff --git a/target-arm/translate.c b/target-arm/translate.c
index cb925ef..192a5d6 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7726,10 +7726,10 @@  static void disas_arm_insn(DisasContext *s, unsigned int insn)
         if ((insn & 0x0ffffdff) == 0x01010000) {
             ARCH(6);
             /* setend */
-            if (((insn >> 9) & 1) != s->bswap_code) {
-                /* Dynamic endianness switching not implemented. */
-                qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
-                goto illegal_op;
+            if (((insn >> 9) & 1) != !!(s->mo_endianness == MO_BE)) {
+                gen_helper_setend(cpu_env);
+                gen_set_pc_im(s, s->pc);
+                s->is_jmp = DISAS_JUMP;
             }
             return;
         } else if ((insn & 0x0fffff00) == 0x057ff000) {
@@ -11064,10 +11064,10 @@  static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
             case 2:
                 /* setend */
                 ARCH(6);
-                if (((insn >> 3) & 1) != s->bswap_code) {
-                    /* Dynamic endianness switching not implemented. */
-                    qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
-                    goto illegal_op;
+                if (((insn >> 3) & 1) != !!(s->mo_endianness == MO_BE)) {
+                    gen_helper_setend(cpu_env);
+                    gen_set_pc_im(s, s->pc);
+                    s->is_jmp = DISAS_JUMP;
                 }
                 break;
             case 3: