@@ -22,22 +22,93 @@
#include <spi.h>
#include <malloc.h>
#include <asm/io.h>
-#include "omap3_spi.h"
+
+#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX)
+#define OMAP3_MCSPI1_BASE 0x48030100
+#define OMAP3_MCSPI2_BASE 0x481A0100
+#else
+#define OMAP3_MCSPI1_BASE 0x48098000
+#define OMAP3_MCSPI2_BASE 0x4809A000
+#define OMAP3_MCSPI3_BASE 0x480B8000
+#define OMAP3_MCSPI4_BASE 0x480BA000
+#endif
+
+#define OMAP3_MCSPI_MAX_FREQ 48000000
+
+/* OMAP3 McSPI registers */
+struct mcspi_channel {
+ unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */
+ unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */
+ unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */
+ unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */
+ unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */
+};
+
+struct mcspi {
+ unsigned char res1[0x10];
+ unsigned int sysconfig; /* 0x10 */
+ unsigned int sysstatus; /* 0x14 */
+ unsigned int irqstatus; /* 0x18 */
+ unsigned int irqenable; /* 0x1C */
+ unsigned int wakeupenable; /* 0x20 */
+ unsigned int syst; /* 0x24 */
+ unsigned int modulctrl; /* 0x28 */
+ struct mcspi_channel channel[4]; /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
+ /* channel1: 0x40 - 0x50, bus 0 & 1 */
+ /* channel2: 0x54 - 0x64, bus 0 & 1 */
+ /* channel3: 0x68 - 0x78, bus 0 */
+};
+
+/* per-register bitmasks */
+#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
+#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2)
+#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0)
+#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET (1 << 1)
+
+#define OMAP3_MCSPI_SYSSTATUS_RESETDONE (1 << 0)
+
+#define OMAP3_MCSPI_MODULCTRL_SINGLE (1 << 0)
+#define OMAP3_MCSPI_MODULCTRL_MS (1 << 2)
+#define OMAP3_MCSPI_MODULCTRL_STEST (1 << 3)
+
+#define OMAP3_MCSPI_CHCONF_PHA (1 << 0)
+#define OMAP3_MCSPI_CHCONF_POL (1 << 1)
+#define OMAP3_MCSPI_CHCONF_CLKD_MASK (0x0f << 2)
+#define OMAP3_MCSPI_CHCONF_EPOL (1 << 6)
+#define OMAP3_MCSPI_CHCONF_WL_MASK (0x1f << 7)
+#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY (0x01 << 12)
+#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY (0x02 << 12)
+#define OMAP3_MCSPI_CHCONF_TRM_MASK (0x03 << 12)
+#define OMAP3_MCSPI_CHCONF_DMAW (1 << 14)
+#define OMAP3_MCSPI_CHCONF_DMAR (1 << 15)
+#define OMAP3_MCSPI_CHCONF_DPE0 (1 << 16)
+#define OMAP3_MCSPI_CHCONF_DPE1 (1 << 17)
+#define OMAP3_MCSPI_CHCONF_IS (1 << 18)
+#define OMAP3_MCSPI_CHCONF_TURBO (1 << 19)
+#define OMAP3_MCSPI_CHCONF_FORCE (1 << 20)
+
+#define OMAP3_MCSPI_CHSTAT_RXS (1 << 0)
+#define OMAP3_MCSPI_CHSTAT_TXS (1 << 1)
+#define OMAP3_MCSPI_CHSTAT_EOT (1 << 2)
+
+#define OMAP3_MCSPI_CHCTRL_EN (1 << 0)
+#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0)
+
+#define OMAP3_MCSPI_WAKEUPENABLE_WKEN (1 << 0)
+
+struct omap3_spi_slave {
+ struct mcspi *regs;
+ unsigned int freq;
+ unsigned int mode;
+};
#define SPI_WAIT_TIMEOUT 10
-#ifdef CONFIG_DM_SPI
static void spi_reset(struct udevice *dev)
-#else
-static void spi_reset(struct omap3_spi_slave *ds)
-#endif
{
unsigned int tmp;
-#ifdef CONFIG_DM_SPI
struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
-#endif
-
writel(OMAP3_MCSPI_SYSCONFIG_SOFTRESET, &ds->regs->sysconfig);
do {
tmp = readl(&ds->regs->sysstatus);
@@ -51,161 +122,37 @@ static void spi_reset(struct omap3_spi_slave *ds)
writel(OMAP3_MCSPI_WAKEUPENABLE_WKEN, &ds->regs->wakeupenable);
}
-#ifdef CONFIG_DM_SPI
static void omap3_spi_write_chconf(struct udevice *dev, int val)
-#else
-static void omap3_spi_write_chconf(struct omap3_spi_slave *ds, int val)
-#endif
{
- unsigned int cs;
-#ifdef CONFIG_DM_SPI
struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
-
-
- cs = platdata->cs;
-#else
- cs = ds->slave.cs;
-#endif
+ unsigned int cs = platdata->cs;
writel(val, &ds->regs->channel[cs].chconf);
/* Flash post writes to make immediate effect */
readl(&ds->regs->channel[cs].chconf);
}
-#ifdef CONFIG_DM_SPI
static void omap3_spi_set_enable(struct udevice *dev, int enable)
-#else
-static void omap3_spi_set_enable(struct omap3_spi_slave *ds, int enable)
-#endif
{
- unsigned int cs;
-#ifdef CONFIG_DM_SPI
struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
-
- cs = platdata->cs;
-#else
- cs = ds->slave.cs;
-#endif
+ unsigned int cs = platdata->cs;
writel(enable, &ds->regs->channel[cs].chctrl);
/* Flash post writes to make immediate effect */
readl(&ds->regs->channel[cs].chctrl);
}
-#ifndef CONFIG_DM_SPI
-void spi_init()
-{
- /* do nothing */
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
-{
- struct omap3_spi_slave *ds;
- struct mcspi *regs;
-
- /*
- * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules)
- * with different number of chip selects (CS, channels):
- * McSPI1 has 4 CS (bus 0, cs 0 - 3)
- * McSPI2 has 2 CS (bus 1, cs 0 - 1)
- * McSPI3 has 2 CS (bus 2, cs 0 - 1)
- * McSPI4 has 1 CS (bus 3, cs 0)
- */
-
- switch (bus) {
- case 0:
- regs = (struct mcspi *)OMAP3_MCSPI1_BASE;
- break;
-#ifdef OMAP3_MCSPI2_BASE
- case 1:
- regs = (struct mcspi *)OMAP3_MCSPI2_BASE;
- break;
-#endif
-#ifdef OMAP3_MCSPI3_BASE
- case 2:
- regs = (struct mcspi *)OMAP3_MCSPI3_BASE;
- break;
-#endif
-#ifdef OMAP3_MCSPI4_BASE
- case 3:
- regs = (struct mcspi *)OMAP3_MCSPI4_BASE;
- break;
-#endif
- default:
- printf("SPI error: unsupported bus %i. \
- Supported busses 0 - 3\n", bus);
- return NULL;
- }
-
- if (((bus == 0) && (cs > 3)) ||
- ((bus == 1) && (cs > 1)) ||
- ((bus == 2) && (cs > 1)) ||
- ((bus == 3) && (cs > 0))) {
- printf("SPI error: unsupported chip select %i \
- on bus %i\n", cs, bus);
- return NULL;
- }
-
- if (max_hz > OMAP3_MCSPI_MAX_FREQ) {
- printf("SPI error: unsupported frequency %i Hz. \
- Max frequency is 48 Mhz\n", max_hz);
- return NULL;
- }
-
- if (mode > SPI_MODE_3) {
- printf("SPI error: unsupported SPI mode %i\n", mode);
- return NULL;
- }
-
- ds = spi_alloc_slave(struct omap3_spi_slave, bus, cs);
- if (!ds) {
- printf("SPI error: malloc of SPI structure failed\n");
- return NULL;
- }
-
- ds->regs = regs;
- ds->freq = max_hz;
- ds->mode = mode;
-
- return &ds->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
- struct omap3_spi_slave *ds = to_omap3_spi(slave);
-
- free(ds);
-}
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return 1;
-}
-#endif
-
-#ifdef CONFIG_DM_SPI
static int omap3_spi_claim_bus(struct udevice *dev)
-#else
-int spi_claim_bus(struct spi_slave *slave)
-#endif
{
- unsigned int cs;
- struct omap3_spi_slave *ds;
unsigned int conf, div = 0;
-#ifdef CONFIG_DM_SPI
struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
struct spi_slave *slave = dev_get_parent_priv(dev);
+ struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
+ unsigned int cs = platdata->cs;
- ds = dev_get_priv(dev->parent);
- cs = platdata->cs;
ds->freq = slave->max_hz;
-#else
- ds = to_omap3_spi(slave);
- cs = ds->slave.cs;
-#endif
/* McSPI global module configuration */
@@ -213,11 +160,7 @@ int spi_claim_bus(struct spi_slave *slave)
* setup when switching from (reset default) slave mode
* to single-channel master mode
*/
-#ifdef CONFIG_DM_SPI
spi_reset(dev);
-#else
- spi_reset(ds);
-#endif
conf = readl(&ds->regs->modulctrl);
conf &= ~(OMAP3_MCSPI_MODULCTRL_STEST | OMAP3_MCSPI_MODULCTRL_MS);
conf |= OMAP3_MCSPI_MODULCTRL_SINGLE;
@@ -276,83 +219,38 @@ int spi_claim_bus(struct spi_slave *slave)
/* Transmit & receive mode */
conf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, conf);
-#else
- omap3_spi_write_chconf(ds,conf);
-#endif
return 0;
}
-#ifdef CONFIG_DM_SPI
int omap3_spi_release_bus(struct udevice *dev)
-#else
-void spi_release_bus(struct spi_slave *slave)
-#endif
{
-#ifndef CONFIG_DM_SPI
- struct omap3_spi_slave *ds = to_omap3_spi(slave);
-#endif
/* Reset the SPI hardware */
-#ifdef CONFIG_DM_SPI
spi_reset(dev);
-#else
- spi_reset(ds);
-#endif
-#ifdef CONFIG_DM_SPI
return 0;
-#endif
}
-#ifdef CONFIG_DM_SPI
int omap3_spi_write(struct udevice *dev, unsigned int len, const void *txp,
unsigned long flags)
-#else
-int omap3_spi_write(struct spi_slave *slave, unsigned int len, const void *txp,
- unsigned long flags)
-#endif
{
- struct omap3_spi_slave *ds;
int i, chconf;
ulong start;
- unsigned int cs;
-#ifdef CONFIG_DM_SPI
struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
struct spi_slave *slave = dev_get_parent_priv(dev);
-
-
- ds = dev_get_priv(dev->parent);
- cs = platdata->cs;
-#else
- ds = to_omap3_spi(slave);
- cs = ds->slave.cs;
-#endif
+ struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
+ unsigned int cs = platdata->cs;
chconf = readl(&ds->regs->channel[cs].chconf);
-#ifdef CONFIG_DM_SPI
/* Enable the channel */
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_EN);
-#else
- /* Enable the channel */
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_EN);
-#endif
-
chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK);
-#ifdef CONFIG_DM_SPI
chconf |= (slave->wordlen - 1) << 7;
-#else
- chconf |= (ds->slave.wordlen - 1) << 7;
-#endif
chconf |= OMAP3_MCSPI_CHCONF_TRM_TX_ONLY;
chconf |= OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
-#else
- omap3_spi_write_chconf(ds, chconf);
-#endif
for (i = 0; i < len; i++) {
/* wait till TX register is empty (TXS == 1) */
@@ -368,17 +266,9 @@ int omap3_spi_write(struct spi_slave *slave, unsigned int len, const void *txp,
/* Write the data */
unsigned int *tx = &ds->regs->channel[cs].tx;
-#ifdef CONFIG_DM_SPI
if (slave->wordlen > 16)
-#else
- if (ds->slave.wordlen > 16)
-#endif
writel(((u32 *)txp)[i], tx);
-#ifdef CONFIG_DM_SPI
else if (slave->wordlen > 8)
-#else
- else if (ds->slave.wordlen > 8)
-#endif
writel(((u16 *)txp)[i], tx);
else
writel(((u8 *)txp)[i], tx);
@@ -390,73 +280,38 @@ int omap3_spi_write(struct spi_slave *slave, unsigned int len, const void *txp,
(OMAP3_MCSPI_CHSTAT_EOT | OMAP3_MCSPI_CHSTAT_TXS))
;
-#ifdef CONFIG_DM_SPI
/* Disable the channel otherwise the next immediate RX will get affected */
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_DIS);
-#else
- /* Disable the channel otherwise the next immediate RX will get affected */
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_DIS);
-#endif
if (flags & SPI_XFER_END) {
chconf &= ~OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
-#else
- omap3_spi_write_chconf(ds, chconf);
-#endif
}
return 0;
}
-#ifdef CONFIG_DM_SPI
-int omap3_spi_read(struct udevice *dev, unsigned int len, void *rxp,
- unsigned long flags)
-#else
-int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp,
- unsigned long flags)
-#endif
+static int omap3_spi_read(struct udevice *dev, unsigned int len, void *rxp,
+ unsigned long flags)
{
- struct omap3_spi_slave *ds;
- int i, chconf;
- ulong start;
- unsigned int cs;
-#ifdef CONFIG_DM_SPI
struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
struct spi_slave *slave = dev_get_parent_priv(dev);
+ struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
+ int i, chconf;
+ ulong start;
+ unsigned int cs = platdata->cs;
-
- ds = dev_get_priv(dev->parent);
- cs = platdata->cs;
-#else
- ds = to_omap3_spi(slave);
- cs = ds->slave.cs;
-#endif
chconf = readl(&ds->regs->channel[cs].chconf);
-#ifdef CONFIG_DM_SPI
/* Enable the channel */
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_EN);
-#else
- /* Enable the channel */
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_EN);
-#endif
chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK);
-#ifdef CONFIG_DM_SPI
chconf |= (slave->wordlen - 1) << 7;
-#else
- chconf |= (ds->slave.wordlen - 1) << 7;
-#endif
chconf |= OMAP3_MCSPI_CHCONF_TRM_RX_ONLY;
chconf |= OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
-#else
- omap3_spi_write_chconf(ds, chconf);
-#endif
writel(0, &ds->regs->channel[cs].tx);
@@ -473,25 +328,13 @@ int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp,
}
/* Disable the channel to prevent furher receiving */
if(i == (len - 1))
-#ifdef CONFIG_DM_SPI
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_DIS);
-#else
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_DIS);
-#endif
/* Read the data */
unsigned int *rx = &ds->regs->channel[cs].rx;
-#ifdef CONFIG_DM_SPI
if (slave->wordlen > 16)
-#else
- if (ds->slave.wordlen > 16)
-#endif
((u32 *)rxp)[i] = readl(rx);
-#ifdef CONFIG_DM_SPI
else if (slave->wordlen > 8)
-#else
- else if (ds->slave.wordlen > 8)
-#endif
((u16 *)rxp)[i] = (u16)readl(rx);
else
((u8 *)rxp)[i] = (u8)readl(rx);
@@ -499,65 +342,34 @@ int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp,
if (flags & SPI_XFER_END) {
chconf &= ~OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
-#else
- omap3_spi_write_chconf(ds, chconf);
-#endif
}
return 0;
}
-#ifdef CONFIG_DM_SPI
/*McSPI Transmit Receive Mode*/
-int omap3_spi_txrx(struct udevice *dev, unsigned int len,
- const void *txp, void *rxp, unsigned long flags)
-#else
-/*McSPI Transmit Receive Mode*/
-int omap3_spi_txrx(struct spi_slave *slave, unsigned int len,
- const void *txp, void *rxp, unsigned long flags)
-#endif
+static int omap3_spi_txrx(struct udevice *dev, unsigned int len,
+ const void *txp, void *rxp, unsigned long flags)
{
- struct omap3_spi_slave *ds;
+ struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
+ struct spi_slave *slave = dev_get_parent_priv(dev);
+ struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
ulong start;
int chconf;
int i=0;
- unsigned int cs;
-#ifdef CONFIG_DM_SPI
- struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
- struct spi_slave *slave = dev_get_parent_priv(dev);
-
+ unsigned int cs = platdata->cs;
- ds = dev_get_priv(dev->parent);
- cs = platdata->cs;
-#else
- ds = to_omap3_spi(slave);
- cs = ds->slave.cs;
-#endif
chconf = readl(&ds->regs->channel[cs].chconf);
-#ifdef CONFIG_DM_SPI
/*Enable SPI channel*/
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_EN);
-#else
- /*Enable SPI channel*/
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_EN);
-#endif
/*set TRANSMIT-RECEIVE Mode*/
chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK);
-#ifdef CONFIG_DM_SPI
chconf |= (slave->wordlen - 1) << 7;
-#else
- chconf |= (ds->slave.wordlen - 1) << 7;
-#endif
chconf |= OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
-#else
- omap3_spi_write_chconf(ds, chconf);
-#endif
/*Shift in and out 1 byte at time*/
for (i=0; i < len; i++){
@@ -573,17 +385,9 @@ int omap3_spi_txrx(struct spi_slave *slave, unsigned int len,
}
/* Write the data */
unsigned int *tx = &ds->regs->channel[cs].tx;
-#ifdef CONFIG_DM_SPI
if (slave->wordlen > 16)
-#else
- if (ds->slave.wordlen > 16)
-#endif
writel(((u32 *)txp)[i], tx);
-#ifdef CONFIG_DM_SPI
else if (slave->wordlen > 8)
-#else
- else if (ds->slave.wordlen > 8)
-#endif
writel(((u16 *)txp)[i], tx);
else
writel(((u8 *)txp)[i], tx);
@@ -600,66 +404,35 @@ int omap3_spi_txrx(struct spi_slave *slave, unsigned int len,
}
/* Read the data */
unsigned int *rx = &ds->regs->channel[cs].rx;
-#ifdef CONFIG_DM_SPI
if (slave->wordlen > 16)
-#else
- if (ds->slave.wordlen > 16)
-#endif
((u32 *)rxp)[i] = readl(rx);
-#ifdef CONFIG_DM_SPI
else if (slave->wordlen > 8)
-#else
- else if (ds->slave.wordlen > 8)
-#endif
((u16 *)rxp)[i] = (u16)readl(rx);
else
((u8 *)rxp)[i] = (u8)readl(rx);
}
-#ifdef CONFIG_DM_SPI
/* Disable the channel */
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_DIS);
-#else
- /* Disable the channel */
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_DIS);
-#endif
/*if transfer must be terminated disable the channel*/
if (flags & SPI_XFER_END) {
chconf &= ~OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
-#else
- omap3_spi_write_chconf(ds, chconf);
-#endif
}
return 0;
}
-#ifdef CONFIG_DM_SPI
-int omap3_spi_xfer(struct udevice *dev, unsigned int bitlen,
- const void *dout, void *din, unsigned long flags)
-#else
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
- const void *dout, void *din, unsigned long flags)
-#endif
+static int omap3_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
{
- struct omap3_spi_slave *ds;
- unsigned int len, cs;
- int ret = -1;
-#ifdef CONFIG_DM_SPI
struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
struct spi_slave *slave = dev_get_parent_priv(dev);
+ struct omap3_spi_slave *ds = dev_get_priv(dev->parent);
+ unsigned int len, cs = platdata->cs;
+ int ret = -1;
- ds = dev_get_priv(dev->parent);
- cs = platdata->cs;
-#else
- ds = to_omap3_spi(slave);
- cs = ds->slave.cs;
-#endif
-
-#ifdef CONFIG_DM_SPI
if (slave->wordlen < 4 || slave->wordlen > 32) {
printf("omap3_spi: invalid wordlen %d\n", slave->wordlen);
return -1;
@@ -669,74 +442,32 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
return -1;
len = bitlen / slave->wordlen;
-#else
- if (ds->slave.wordlen < 4 || ds->slave.wordlen > 32) {
- printf("omap3_spi: invalid wordlen %d\n", ds->slave.wordlen);
- return -1;
- }
-
- if (bitlen % ds->slave.wordlen)
- return -1;
-
- len = bitlen / ds->slave.wordlen;
-#endif
if (bitlen == 0) { /* only change CS */
int chconf = readl(&ds->regs->channel[cs].chconf);
if (flags & SPI_XFER_BEGIN) {
-#ifdef CONFIG_DM_SPI
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_EN);
-#else
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_EN);
-#endif
chconf |= OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
-#else
- omap3_spi_write_chconf(ds, chconf);
-#endif
}
if (flags & SPI_XFER_END) {
chconf &= ~OMAP3_MCSPI_CHCONF_FORCE;
-#ifdef CONFIG_DM_SPI
omap3_spi_write_chconf(dev, chconf);
omap3_spi_set_enable(dev, OMAP3_MCSPI_CHCTRL_DIS);
-#else
- omap3_spi_write_chconf(ds, chconf);
- omap3_spi_set_enable(ds, OMAP3_MCSPI_CHCTRL_DIS);
-#endif
}
ret = 0;
} else {
-#ifdef CONFIG_DM_SPI
if (dout != NULL && din != NULL)
ret = omap3_spi_txrx(dev, len, dout, din, flags);
else if (dout != NULL)
ret = omap3_spi_write(dev, len, dout, flags);
else if (din != NULL)
ret = omap3_spi_read(dev, len, din, flags);
-#else
- if (dout != NULL && din != NULL)
- ret = omap3_spi_txrx(slave, len, dout, din, flags);
- else if (dout != NULL)
- ret = omap3_spi_write(slave, len, dout, flags);
- else if (din != NULL)
- ret = omap3_spi_read(slave, len, din, flags);
-#endif
}
return ret;
}
-void spi_cs_activate(struct spi_slave *slave)
-{
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
-}
-
-#ifdef CONFIG_DM_SPI
static int omap3_spi_probe(struct udevice *dev)
{
struct omap3_spi_slave *ds = dev_get_priv(dev);
@@ -779,4 +510,3 @@ U_BOOT_DRIVER(omap3_spi) = {
.ops = &omap3_spi_ops,
.priv_auto_alloc_size = sizeof(struct omap3_spi_slave),
};
-#endif
deleted file mode 100644
@@ -1,121 +0,0 @@
-/*
- * Register definitions for the OMAP3 McSPI Controller
- *
- * Copyright (C) 2010 Dirk Behme <dirk.behme@googlemail.com>
- *
- * Parts taken from linux/drivers/spi/omap2_mcspi.c
- * Copyright (C) 2005, 2006 Nokia Corporation
- *
- * Modified by Ruslan Araslanov <ruslan.araslanov@vitecmm.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _OMAP3_SPI_H_
-#define _OMAP3_SPI_H_
-
-#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX)
-#define OMAP3_MCSPI1_BASE 0x48030100
-#define OMAP3_MCSPI2_BASE 0x481A0100
-#else
-#define OMAP3_MCSPI1_BASE 0x48098000
-#define OMAP3_MCSPI2_BASE 0x4809A000
-#define OMAP3_MCSPI3_BASE 0x480B8000
-#define OMAP3_MCSPI4_BASE 0x480BA000
-#endif
-
-#define OMAP3_MCSPI_MAX_FREQ 48000000
-
-/* OMAP3 McSPI registers */
-struct mcspi_channel {
- unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */
- unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */
- unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */
- unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */
- unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */
-};
-
-struct mcspi {
- unsigned char res1[0x10];
- unsigned int sysconfig; /* 0x10 */
- unsigned int sysstatus; /* 0x14 */
- unsigned int irqstatus; /* 0x18 */
- unsigned int irqenable; /* 0x1C */
- unsigned int wakeupenable; /* 0x20 */
- unsigned int syst; /* 0x24 */
- unsigned int modulctrl; /* 0x28 */
- struct mcspi_channel channel[4]; /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
- /* channel1: 0x40 - 0x50, bus 0 & 1 */
- /* channel2: 0x54 - 0x64, bus 0 & 1 */
- /* channel3: 0x68 - 0x78, bus 0 */
-};
-
-/* per-register bitmasks */
-#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
-#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2)
-#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0)
-#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1)
-
-#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0)
-
-#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0)
-#define OMAP3_MCSPI_MODULCTRL_MS BIT(2)
-#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3)
-
-#define OMAP3_MCSPI_CHCONF_PHA BIT(0)
-#define OMAP3_MCSPI_CHCONF_POL BIT(1)
-#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2)
-#define OMAP3_MCSPI_CHCONF_EPOL BIT(6)
-#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7)
-#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12)
-#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13)
-#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12)
-#define OMAP3_MCSPI_CHCONF_DMAW BIT(14)
-#define OMAP3_MCSPI_CHCONF_DMAR BIT(15)
-#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16)
-#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17)
-#define OMAP3_MCSPI_CHCONF_IS BIT(18)
-#define OMAP3_MCSPI_CHCONF_TURBO BIT(19)
-#define OMAP3_MCSPI_CHCONF_FORCE BIT(20)
-
-#define OMAP3_MCSPI_CHSTAT_RXS BIT(0)
-#define OMAP3_MCSPI_CHSTAT_TXS BIT(1)
-#define OMAP3_MCSPI_CHSTAT_EOT BIT(2)
-
-#define OMAP3_MCSPI_CHCTRL_EN BIT(0)
-#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0)
-
-#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0)
-
-struct omap3_spi_slave {
-#ifndef CONFIG_DM_SPI
- struct spi_slave slave;
-#endif
- struct mcspi *regs;
- unsigned int freq;
- unsigned int mode;
-};
-
-#ifndef CONFIG_DM_SPI
-static inline struct omap3_spi_slave *to_omap3_spi(struct spi_slave *slave)
-{
- return container_of(slave, struct omap3_spi_slave, slave);
-}
-#endif
-
-#ifdef CONFIG_DM_SPI
-int omap3_spi_txrx(struct udevice *dev, unsigned int len, const void *txp,
- void *rxp, unsigned long flags);
-int omap3_spi_write(struct udevice *dev, unsigned int len, const void *txp,
- unsigned long flags);
-int omap3_spi_read(struct udevice *dev, unsigned int len, void *rxp,
- unsigned long flags);
-#else
-int omap3_spi_txrx(struct spi_slave *slave, unsigned int len, const void *txp,
- void *rxp, unsigned long flags);
-int omap3_spi_write(struct spi_slave *slave, unsigned int len, const void *txp,
- unsigned long flags);
-int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp,
- unsigned long flags);
-#endif
-#endif /* _OMAP3_SPI_H_ */
For several reasons: - code clarity - DM trends in u-boot ... It is better to make omap3_spi driver 100% DM_SPI based. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> --- drivers/spi/omap3_spi.c | 474 +++++++++++------------------------------------- drivers/spi/omap3_spi.h | 121 ------------ 2 files changed, 102 insertions(+), 493 deletions(-) delete mode 100644 drivers/spi/omap3_spi.h