| Message ID | BLU436-SMTP175812A7FBA809D0BB5BF3CFFFC0@phx.gbl |
|---|---|
| State | Superseded |
| Delegated to: | Daniel Schwierzeck |
| Headers | show |
On Tue, 29 Dec 2015 19:17:09 +0800 Wills Wang <wills.wang@live.com> wrote: > U-boot just use the no MMU virtual address segment(KSEG0/1), this > patch enable access the uncached memory range(KSEG1) by flag > "MAP_NOCACHE", other flag for KSEG0 access. > > Signed-off-by: Wills Wang <wills.wang@live.com> > --- > > Changes in v5: None > Changes in v4: None > Changes in v3: None > Changes in v2: None > > arch/mips/include/asm/io.h | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h > index a7ab087..943053d 100644 > --- a/arch/mips/include/asm/io.h > +++ b/arch/mips/include/asm/io.h > @@ -485,7 +485,7 @@ static inline void sync(void) > * that can be used to access the memory range with the caching > * properties specified by "flags". > */ > -#define MAP_NOCACHE (0) > +#define MAP_NOCACHE (1) > #define MAP_WRCOMBINE (0) > #define MAP_WRBACK (0) > #define MAP_WRTHROUGH (0) > @@ -493,7 +493,10 @@ static inline void sync(void) > static inline void * > map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) > { > - return (void *)paddr; > + if (flags) > + return (void *)KSEG1ADDR(paddr); > + else This 'else' is redundant here. > + return (void *)KSEG0ADDR(paddr); > } > > /* > -- > 1.9.1 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
Am 29.12.2015 um 12:17 schrieb Wills Wang: > U-boot just use the no MMU virtual address segment(KSEG0/1), this > patch enable access the uncached memory range(KSEG1) by flag > "MAP_NOCACHE", other flag for KSEG0 access. > > Signed-off-by: Wills Wang <wills.wang@live.com> > --- > > Changes in v5: None > Changes in v4: None > Changes in v3: None > Changes in v2: None > > arch/mips/include/asm/io.h | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h > index a7ab087..943053d 100644 > --- a/arch/mips/include/asm/io.h > +++ b/arch/mips/include/asm/io.h > @@ -485,7 +485,7 @@ static inline void sync(void) > * that can be used to access the memory range with the caching > * properties specified by "flags". > */ > -#define MAP_NOCACHE (0) > +#define MAP_NOCACHE (1) > #define MAP_WRCOMBINE (0) > #define MAP_WRBACK (0) > #define MAP_WRTHROUGH (0) > @@ -493,7 +493,10 @@ static inline void sync(void) > static inline void * > map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) > { > - return (void *)paddr; > + if (flags) > + return (void *)KSEG1ADDR(paddr); > + else > + return (void *)KSEG0ADDR(paddr); > } please use CKSEG0ADDR and CKSEG1ADDR to be compatible with MIPS64. Also drop the 'else' and always return CKSEG0ADDR as default. > > /* >
On 12/29/2015 08:49 PM, Antony Pavlov wrote: > On Tue, 29 Dec 2015 19:17:09 +0800 > Wills Wang <wills.wang@live.com> wrote: > >> U-boot just use the no MMU virtual address segment(KSEG0/1), this >> patch enable access the uncached memory range(KSEG1) by flag >> "MAP_NOCACHE", other flag for KSEG0 access. >> >> Signed-off-by: Wills Wang <wills.wang@live.com> >> --- >> >> Changes in v5: None >> Changes in v4: None >> Changes in v3: None >> Changes in v2: None >> >> arch/mips/include/asm/io.h | 7 +++++-- >> 1 file changed, 5 insertions(+), 2 deletions(-) >> >> diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h >> index a7ab087..943053d 100644 >> --- a/arch/mips/include/asm/io.h >> +++ b/arch/mips/include/asm/io.h >> @@ -485,7 +485,7 @@ static inline void sync(void) >> * that can be used to access the memory range with the caching >> * properties specified by "flags". >> */ >> -#define MAP_NOCACHE (0) >> +#define MAP_NOCACHE (1) >> #define MAP_WRCOMBINE (0) >> #define MAP_WRBACK (0) >> #define MAP_WRTHROUGH (0) >> @@ -493,7 +493,10 @@ static inline void sync(void) >> static inline void * >> map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) >> { >> - return (void *)paddr; >> + if (flags) >> + return (void *)KSEG1ADDR(paddr); >> + else > This 'else' is redundant here. Ok. >> + return (void *)KSEG0ADDR(paddr); >> } >> >> /* >> -- >> 1.9.1 >> >> _______________________________________________ >> U-Boot mailing list >> U-Boot@lists.denx.de >> http://lists.denx.de/mailman/listinfo/u-boot >
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index a7ab087..943053d 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -485,7 +485,7 @@ static inline void sync(void) * that can be used to access the memory range with the caching * properties specified by "flags". */ -#define MAP_NOCACHE (0) +#define MAP_NOCACHE (1) #define MAP_WRCOMBINE (0) #define MAP_WRBACK (0) #define MAP_WRTHROUGH (0) @@ -493,7 +493,10 @@ static inline void sync(void) static inline void * map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { - return (void *)paddr; + if (flags) + return (void *)KSEG1ADDR(paddr); + else + return (void *)KSEG0ADDR(paddr); } /*
U-boot just use the no MMU virtual address segment(KSEG0/1), this patch enable access the uncached memory range(KSEG1) by flag "MAP_NOCACHE", other flag for KSEG0 access. Signed-off-by: Wills Wang <wills.wang@live.com> --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/mips/include/asm/io.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)