diff mbox

[U-Boot,v3,2/5] usb: dwc2: Use shared wait_for_bit

Message ID 1451237293-24497-3-git-send-email-mateusz.kulikowski@gmail.com
State Superseded
Delegated to: Marek Vasut
Headers show

Commit Message

Mateusz Kulikowski Dec. 27, 2015, 5:28 p.m. UTC 
Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
---

 drivers/usb/host/dwc2.c | 41 +++++++++++++----------------------------
 1 file changed, 13 insertions(+), 28 deletions(-)

Comments

Stefan Brüns Dec. 27, 2015, 10:17 p.m. UTC | #1 
On Sonntag, 27. Dezember 2015 18:28:09 CET Mateusz Kulikowski wrote:
> Use existing library function to poll bit(s).
> 
> Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>

It might be useful to have not only a relative timeout, but also an absolute 
timeout. For dwc2, the timeout handling could be moved from the transactions 
wrappers to the chunk_msg function. As the USB timeouts are specified for the 
whole transaction, it would be very neat to calculate one deadline for the 
whole transaction and hand this absolute timeout to the wait_for_bit(..) 
function. At the end, this would also result in less code.

Kind regards,

Stefan
Mateusz Kulikowski Dec. 31, 2015, 11:31 a.m. UTC | #2 
Hi Stefan,

On Sun, Dec 27, 2015 at 11:17:55PM +0100, Stefan Bruens wrote:
> On Sonntag, 27. Dezember 2015 18:28:09 CET Mateusz Kulikowski wrote:
> > Use existing library function to poll bit(s).
> > 
> > Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
> 
> It might be useful to have not only a relative timeout, but also an absolute 
> timeout. For dwc2, the timeout handling could be moved from the transactions 
> wrappers to the chunk_msg function. As the USB timeouts are specified for the 
> whole transaction, it would be very neat to calculate one deadline for the 
> whole transaction and hand this absolute timeout to the wait_for_bit(..) 
> function. At the end, this would also result in less code.

This may be a good idea, but I prefer to add it to my todo list (or you can 
do it once this series gets submitted or as dependant patch).

I need wait_for_bit for my board/driver. Doing another set of upgrades 
will delay it.
I will also have access to dwc2 device around mid. Jan so will be able to test
"bigger" refactors.

Is it ok with you?

Regards,
Mateusz
Tom Rini Jan. 14, 2016, 8:08 p.m. UTC | #3 
On Sun, Dec 27, 2015 at 06:28:09PM +0100, Mateusz Kulikowski wrote:

> Use existing library function to poll bit(s).
> 
> Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>

Reviewed-by: Tom Rini <trini@konsulko.com>
diff mbox

Patch

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 541c0f9..42d31e3 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -13,6 +13,7 @@ 
 #include <memalign.h>
 #include <phys2bus.h>
 #include <usbroothubdes.h>
+#include <wait_bit.h>
 #include <asm/io.h>
 
 #include "dwc2.h"
@@ -52,27 +53,6 @@  static struct dwc2_priv local;
 /*
  * DWC2 IP interface
  */
-static int wait_for_bit(void *reg, const uint32_t mask, bool set)
-{
-	unsigned int timeout = 1000000;
-	uint32_t val;
-
-	while (--timeout) {
-		val = readl(reg);
-		if (!set)
-			val = ~val;
-
-		if ((val & mask) == mask)
-			return 0;
-
-		udelay(1);
-	}
-
-	debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n",
-	      __func__, reg, mask, set);
-
-	return -ETIMEDOUT;
-}
 
 /*
  * Initializes the FSLSPClkSel field of the HCFG register
@@ -117,7 +97,8 @@  static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)
 
 	writel(DWC2_GRSTCTL_TXFFLSH | (num << DWC2_GRSTCTL_TXFNUM_OFFSET),
 	       &regs->grstctl);
-	ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_TXFFLSH, 0);
+	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_TXFFLSH,
+			   false, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
@@ -135,7 +116,8 @@  static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)
 	int ret;
 
 	writel(DWC2_GRSTCTL_RXFFLSH, &regs->grstctl);
-	ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_RXFFLSH, 0);
+	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_RXFFLSH,
+			   false, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
@@ -152,13 +134,15 @@  static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
 	int ret;
 
 	/* Wait for AHB master IDLE state. */
-	ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_AHBIDLE, 1);
+	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_AHBIDLE,
+			   true, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
 	/* Core Soft Reset */
 	writel(DWC2_GRSTCTL_CSFTRST, &regs->grstctl);
-	ret = wait_for_bit(&regs->grstctl, DWC2_GRSTCTL_CSFTRST, 0);
+	ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_CSFTRST,
+			   false, 1000, false);
 	if (ret)
 		printf("%s: Timeout!\n", __func__);
 
@@ -243,8 +227,8 @@  static void dwc_otg_core_host_init(struct dwc2_core_regs *regs)
 		clrsetbits_le32(&regs->hc_regs[i].hcchar,
 				DWC2_HCCHAR_EPDIR,
 				DWC2_HCCHAR_CHEN | DWC2_HCCHAR_CHDIS);
-		ret = wait_for_bit(&regs->hc_regs[i].hcchar,
-				   DWC2_HCCHAR_CHEN, 0);
+		ret = wait_for_bit(__func__, &regs->hc_regs[i].hcchar,
+				   DWC2_HCCHAR_CHEN, false, 1000, false);
 		if (ret)
 			printf("%s: Timeout!\n", __func__);
 	}
@@ -737,7 +721,8 @@  int wait_for_chhltd(struct dwc2_core_regs *regs, uint32_t *sub, int *toggle,
 	int ret;
 	uint32_t hcint, hctsiz;
 
-	ret = wait_for_bit(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true);
+	ret = wait_for_bit(__func__, &hc_regs->hcint, DWC2_HCINT_CHHLTD, true,
+			   1000, false);
 	if (ret)
 		return ret;