diff mbox

[U-Boot] imx_watchdog: always set minimal timeout in reset_cpu

Message ID 1450634998-17310-1-git-send-email-andrej.skvortzov@gmail.com
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

Andrey Skvortsov Dec. 20, 2015, 6:09 p.m. UTC
The problem is that timeout bits in WCR register were leaved unchanged.
So previously set timeout value was applied and therefore 'reset'
command takes any value up to two minutes, depending on previous
watchdog settings, instead of minimal 0.5 seconds.

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
---
 drivers/watchdog/imx_watchdog.c | 2 +-
 include/fsl_wdog.h              | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

Comments

Stefano Babic Jan. 7, 2016, 4:55 p.m. UTC | #1
On 20/12/2015 19:09, Andrey Skvortsov wrote:
> The problem is that timeout bits in WCR register were leaved unchanged.
> So previously set timeout value was applied and therefore 'reset'
> command takes any value up to two minutes, depending on previous
> watchdog settings, instead of minimal 0.5 seconds.
> 
> Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
> ---


Applied (fix) to u-boot-imx, thanks !

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
index 0d77595..f9f8175 100644
--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -43,7 +43,7 @@  void reset_cpu(ulong addr)
 {
 	struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
 
-	clrsetbits_le16(&wdog->wcr, 0, WCR_WDE);
+	clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE);
 
 	writew(0x5555, &wdog->wsr);
 	writew(0xaaaa, &wdog->wsr);	/* load minimum 1/2 second timeout */
diff --git a/include/fsl_wdog.h b/include/fsl_wdog.h
index d15a70c..f698d4d 100644
--- a/include/fsl_wdog.h
+++ b/include/fsl_wdog.h
@@ -16,3 +16,4 @@  struct watchdog_regs {
 #define WCR_WDT		0x08
 #define WCR_SRS		0x10
 #define SET_WCR_WT(x)	(x << 8)
+#define WCR_WT_MSK	SET_WCR_WT(0xFF)