| Message ID | 5665FED5.8010502@opensource.altera.com |
|---|---|
| State | RFC |
| Delegated to: | Marek Vasut |
| Headers | show |
On Monday, December 07, 2015 at 10:49:09 PM, Dinh Nguyen wrote: > On 12/05/2015 02:43 PM, Marek Vasut wrote: > > This patch adds the necessary OF alias for the UDC node, which let's > > the code locate the DWC2 UDC base address in OF instead of hard-coding > > it into the U-Boot binary. The code is adjusted to use the address from > > OF instead of the hard-coded one. Finally, the hard-coded address is > > removed and USB DM support is enabled. > > > > Signed-off-by: Marek Vasut <marex@denx.de> > > Cc: Chin Liang See <clsee@altera.com> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > > Cc: Lukasz Majewski <l.majewski@majess.pl> > > Cc: Lukasz Majewski <l.majewski@samsung.com> > > --- > > > > arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ > > board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- > > configs/socfpga_socrates_defconfig | 2 ++ > > include/configs/socfpga_socrates.h | 3 --- > > 4 files changed, 29 insertions(+), 5 deletions(-) > > <snip> > > > diff --git a/include/configs/socfpga_socrates.h > > b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 > > --- a/include/configs/socfpga_socrates.h > > +++ b/include/configs/socfpga_socrates.h > > @@ -52,9 +52,6 @@ > > > > #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ > > > > /* USB */ > > > > -#ifdef CONFIG_CMD_USB > > -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS > > -#endif > > > > #define CONFIG_G_DNL_MANUFACTURER "EBV" > > > > /* Extra Environment */ > > With this patch series, I think you should follow up with a patch like > below? > > --- > > diff --git a/include/configs/socfpga_common.h > b/include/configs/socfpga_common.h > index f74c758..b57fd4c 100644 > --- a/include/configs/socfpga_common.h > +++ b/include/configs/socfpga_common.h > @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); > #ifdef CONFIG_CMD_USB > #define CONFIG_USB_DWC2 > #define CONFIG_USB_STORAGE > -/* > - * NOTE: User must define either of the following to select which > - * of the two USB controllers available on SoCFPGA to use. > - * The DWC2 driver doesn't support multiple USB controllers. > - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS > - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS > - */ > #endif You're right. Can you give me a SoB line on this or submit one ? Best regards, Marek Vasut
On Mon, Dec 7, 2015 at 4:01 PM, Marek Vasut <marex@denx.de> wrote: > On Monday, December 07, 2015 at 10:49:09 PM, Dinh Nguyen wrote: >> On 12/05/2015 02:43 PM, Marek Vasut wrote: >> > This patch adds the necessary OF alias for the UDC node, which let's >> > the code locate the DWC2 UDC base address in OF instead of hard-coding >> > it into the U-Boot binary. The code is adjusted to use the address from >> > OF instead of the hard-coded one. Finally, the hard-coded address is >> > removed and USB DM support is enabled. >> > >> > Signed-off-by: Marek Vasut <marex@denx.de> >> > Cc: Chin Liang See <clsee@altera.com> >> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> >> > Cc: Lukasz Majewski <l.majewski@majess.pl> >> > Cc: Lukasz Majewski <l.majewski@samsung.com> >> > --- >> > >> > arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ >> > board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- >> > configs/socfpga_socrates_defconfig | 2 ++ >> > include/configs/socfpga_socrates.h | 3 --- >> > 4 files changed, 29 insertions(+), 5 deletions(-) >> >> <snip> >> >> > diff --git a/include/configs/socfpga_socrates.h >> > b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 >> > --- a/include/configs/socfpga_socrates.h >> > +++ b/include/configs/socfpga_socrates.h >> > @@ -52,9 +52,6 @@ >> > >> > #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ >> > >> > /* USB */ >> > >> > -#ifdef CONFIG_CMD_USB >> > -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS >> > -#endif >> > >> > #define CONFIG_G_DNL_MANUFACTURER "EBV" >> > >> > /* Extra Environment */ >> >> With this patch series, I think you should follow up with a patch like >> below? >> >> --- >> >> diff --git a/include/configs/socfpga_common.h >> b/include/configs/socfpga_common.h >> index f74c758..b57fd4c 100644 >> --- a/include/configs/socfpga_common.h >> +++ b/include/configs/socfpga_common.h >> @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); >> #ifdef CONFIG_CMD_USB >> #define CONFIG_USB_DWC2 >> #define CONFIG_USB_STORAGE >> -/* >> - * NOTE: User must define either of the following to select which >> - * of the two USB controllers available on SoCFPGA to use. >> - * The DWC2 driver doesn't support multiple USB controllers. >> - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS >> - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS >> - */ >> #endif > > You're right. Can you give me a SoB line on this or submit one ? > I'll submit a patch for you. Dinh
On Monday, December 07, 2015 at 11:49:47 PM, Dinh Nguyen wrote: > On Mon, Dec 7, 2015 at 4:01 PM, Marek Vasut <marex@denx.de> wrote: > > On Monday, December 07, 2015 at 10:49:09 PM, Dinh Nguyen wrote: > >> On 12/05/2015 02:43 PM, Marek Vasut wrote: > >> > This patch adds the necessary OF alias for the UDC node, which let's > >> > the code locate the DWC2 UDC base address in OF instead of hard-coding > >> > it into the U-Boot binary. The code is adjusted to use the address > >> > from OF instead of the hard-coded one. Finally, the hard-coded > >> > address is removed and USB DM support is enabled. > >> > > >> > Signed-off-by: Marek Vasut <marex@denx.de> > >> > Cc: Chin Liang See <clsee@altera.com> > >> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com> > >> > Cc: Lukasz Majewski <l.majewski@majess.pl> > >> > Cc: Lukasz Majewski <l.majewski@samsung.com> > >> > --- > >> > > >> > arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ > >> > board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- > >> > configs/socfpga_socrates_defconfig | 2 ++ > >> > include/configs/socfpga_socrates.h | 3 --- > >> > 4 files changed, 29 insertions(+), 5 deletions(-) > >> > >> <snip> > >> > >> > diff --git a/include/configs/socfpga_socrates.h > >> > b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 > >> > --- a/include/configs/socfpga_socrates.h > >> > +++ b/include/configs/socfpga_socrates.h > >> > @@ -52,9 +52,6 @@ > >> > > >> > #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ > >> > > >> > /* USB */ > >> > > >> > -#ifdef CONFIG_CMD_USB > >> > -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS > >> > -#endif > >> > > >> > #define CONFIG_G_DNL_MANUFACTURER "EBV" > >> > > >> > /* Extra Environment */ > >> > >> With this patch series, I think you should follow up with a patch like > >> below? > >> > >> --- > >> > >> diff --git a/include/configs/socfpga_common.h > >> b/include/configs/socfpga_common.h > >> index f74c758..b57fd4c 100644 > >> --- a/include/configs/socfpga_common.h > >> +++ b/include/configs/socfpga_common.h > >> @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); > >> > >> #ifdef CONFIG_CMD_USB > >> #define CONFIG_USB_DWC2 > >> #define CONFIG_USB_STORAGE > >> > >> -/* > >> - * NOTE: User must define either of the following to select which > >> - * of the two USB controllers available on SoCFPGA to use. > >> - * The DWC2 driver doesn't support multiple USB controllers. > >> - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS > >> - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS > >> - */ > >> > >> #endif > > > > You're right. Can you give me a SoB line on this or submit one ? > > I'll submit a patch for you. Thanks! I am completely happy that we're finally reaching the point where we just don't need any of the board-specific crap. My next step I think would be to revisit the configuration files in include/configs/socfpga_* and possibly do some more unification of those into include/configs/socfpga_common.h .
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f74c758..b57fd4c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* - * NOTE: User must define either of the following to select which - * of the two USB controllers available on SoCFPGA to use. - * The DWC2 driver doesn't support multiple USB controllers. - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS - */ #endif /*