diff mbox

[U-Boot,2/2] net: zynq: Add support for different PHY interface types

Message ID 9f0091c025d8166492dfdf771a5974d0afdcb0b3.1445958407.git.michal.simek@xilinx.com
State Accepted
Delegated to: Michal Simek
Headers show

Commit Message

Michal Simek Oct. 27, 2015, 3:06 p.m. UTC
MII is setup by default for all cases. The most of boards are using
RGMII but PHY drivers are not doing any specific setting that's why MII
setting was working fine. With TI DP83867 is necessary to setup
paramaters based on interface type.

Use one setting per board for it which is something what will be removed
when driver is moved to DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 drivers/net/zynq_gem.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

Joe Hershberger Nov. 2, 2015, 9:18 p.m. UTC | #1
On Tue, Oct 27, 2015 at 10:06 AM, Michal Simek <michal.simek@xilinx.com> wrote:
> MII is setup by default for all cases. The most of boards are using
> RGMII but PHY drivers are not doing any specific setting that's why MII
> setting was working fine. With TI DP83867 is necessary to setup
> paramaters based on interface type.
>
> Use one setting per board for it which is something what will be removed
> when driver is moved to DM.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
diff mbox

Patch

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 3d21ad617359..72f1332c8008 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -156,6 +156,7 @@  struct zynq_gem_priv {
 	int phyaddr;
 	u32 emio;
 	int init;
+	phy_interface_t interface;
 	struct phy_device *phydev;
 	struct mii_dev *bus;
 };
@@ -359,7 +360,7 @@  static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
 
 	/* interface - look at tsec */
 	phydev = phy_connect(priv->bus, priv->phyaddr, dev,
-			     PHY_INTERFACE_MODE_MII);
+			     priv->interface);
 
 	phydev->supported = supported | ADVERTISED_Pause |
 			    ADVERTISED_Asym_Pause;
@@ -546,6 +547,12 @@  int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
 	priv->phyaddr = phy_addr;
 	priv->emio = emio;
 
+#ifndef CONFIG_ZYNQ_GEM_INTERFACE
+	priv->interface = PHY_INTERFACE_MODE_MII;
+#else
+	priv->interface = CONFIG_ZYNQ_GEM_INTERFACE;
+#endif
+
 	sprintf(dev->name, "Gem.%lx", base_addr);
 
 	dev->iobase = base_addr;